According to the benchmark listing, the Core Ultra 7 270K Plus scored 22,206 points in multi-core and 3,205 points in single-core tests, making it almost 10% faster than the Core Ultra 7 265 K's typical scores on the same compute benchmark.

Additional details confirm that the CPU features 24 cores (8P + 16E), 24 threads, and a maximum boost clock of 5.5 GHz. The CPU was tested with 48GB of DDR5 memory at 7,182 MT/s and an RTX 5090D GPU in a Lenovo-branded system, meaning that the CPU could potentially be exclusive to system integrators. The faster memory support also suggests that this particular CPU could be a part of an Arrow Lake refresh, as the current lineup of chips supports up to DDR5 6,400 MT/s memory.

The Intel Core Ultra 200S series officially launched in October 2024, marking the debut of the Arrow Lake desktop lineup and Intel’s first chiplet-based architecture for consumer CPUs. The release came at a critical time for the company, following a difficult financial quarter and mounting competition from AMD. Unfortunately, Arrow Lake failed to deliver the kind of turnaround it was hoping for as early sales tapered off within weeks of launch, and the chips struggled to gain traction even months later as buyers continued to favor older Raptor Lake models.

If the leaked benchmarks hold any authenticity, Intel might be preparing more SKUs under the Arrow Lake branding to potentially address the shortcomings of its current lineup. Whether the Core Ultra 7 270K Plus becomes part of that effort remains to be seen, but the company clearly isn’t ready to move on from Arrow Lake just yet.

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The leaks appeared early this morning; there are fully eight results in total. Someone was testing an ASUS ROG Zephyrus G14 (GU405AA) laptop using the Geekbench Compute test on the integrated Xe3 GPU of an "Intel Core Ultra X7 358H". That model matches one of the leaked model names that was posted on ChipHell earlier this month and confirmed by CPUID, the developers of HWMonitor. The chip has sixteen CPU cores, which we understand to comprise four Cougar Cove P-cores, eight Darkmont E-cores, and four Darkmont LP-cores.

While the Geekbench result lists a maximum CPU frequency of 3751 MHz, digging into the result JSON tells a different story. Forty-five values populate the processor_frequency.frequencies array, ranging from 3519 MHz all the way up to 4767 MHz, and that's not a huge outlier; there are many results in the 4600-4700 MHz range. This might give us an idea of what kind of boost clocks we can expect from Panther Lake; 4.75 GHz is right in the same ballpark of what you can expect from AMD's Ryzen AI 9 HX 370 during a gaming workload.

As previously leaked by the well-known Golden Pig Upgrade, the "X" in the model name seems to indicate that this chip has the full 12-core GPU. Indeed, Geekbench reports that the tested GPU has 96 "Compute Units," because it's counting the individual Xe Vector Engines, or XVEs. There are eight XVEs to a Xe3-core; thus, twelve cores means 96 XVEs.

We knew that already, but what we didn't know were the kinds of clock rates we could expect from the integrated GPU. Geekbench reports a Maximum Frequency of 2.5 GHz, which is quite respectable even among integrated GPUs. This may not even be final silicon or drivers, though, because the GPU is reported as simply being an "Intel(R) Arc(TM) [0] GPU (16GB)".

The scores for the benchmark slowly went up as the tester re-ran it; the highest score achieved was 52946 points under OpenCL. Glancing over the Geekbench Browser, this result is in broadly the same range as AMD's Radeon 890M graphics, and in fact ahead of both the mobile GeForce RTX 3050 and Intel's own Arc A550M, which has sixteen Xe-cores and a relatively thirsty 75W-95W TDP. While the score might not sound too impressive, remember that we're looking at an integrated GPU with non-final software, running a benchmark that Intel typically lags in. So saying, it's actually a reasonably impressive result; these scores already beat Lunar Lake by nearly double.

Panther Lake's integrated graphics are based on the Xe3 architecture, but unlike Xe2, where every implementation of it used the same fundamental architecture, Xe3 takes a step back toward the original Xe philosophy, where the GPU core architecture is tweaked for the specific application. The upcoming "Celestial" discrete GPUs based on Xe3 will purportedly use the "Xe3p" variant of the architecture, about which nearly nothing is known just yet.

Despite being based on Xe3, though, the graphics in Panther Lake will be branded as Arc B-series products. That's because, as our own Jeff Kampman said, Xe3 is "more of a continuous improvement of the existing Battlemage architectural lineage than an all-new design." Intel says that Xe3 offers as much as a 7.4x improvement in certain microbenchmarks, but is only committed to an "over 50%" gain in actual performance versus the "Lunar Lake" Core Ultra 200V series. 50% is the gain in GPU size over Lunar Lake, so let's hope this Geekbench result is a hint at a much larger gain than that versus the last-gen chips.

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If the information from Chi11edog is to be believed, then the new lineup will be headed by the Ryzen 9 9950X3D2: a 16-core processor clocked at 4.30 GHz – 5.60 GHz and equipped with a whopping 192 MB of L3 cache (up from 128MB in case of the 9950X3D) as it will come with two 3D V-Cache chiplets (one chiplet per core chiplet die). The default thermal design power (TDP) of the CPU will reportedly increase to 200W from 170W on current models, but the processor's performance increase could be well worth it in applications that demand high memory bandwidth, such as games.

For gamers who do not want to invest a small fortune in a top-of-the-line CPU, AMD will purportedly offer the Ryzen 7 9850X3D. This eight-core CPU will run at 4.70 GHz – 5.60 GHz and feature 96 MB of L3 Cache using internal SRAM and an external 3D V-Cache chiplet. Since the CPU will differ from the existing Ryzen 7 9850X3D with a higher turbo clock, it will retain a default TDP of 120W.

Since the information comes from an unofficial source, it should be taken with a grain of salt. Nonetheless, it makes great sense for AMD to refresh its Ryzen 9000-series 'Granite Ridge' lineup based on the Zen 5 microarchitecture, both from a technology and marketing strategies point of view.

AMD's Zen 5 CCDs have been made for well over a year on a proven TSMC N4 fabrication technology; their yields are probably very good, so the company can safely boost clock speeds, raise power limits, and stack more cache without spending too much on redesign. Also, the new Ryzen 9000-series processors will keep using the AM5 platform, enabling drop-in upgrades for existing users, higher performance for those who are in the market for a new desktop, and new models for PC makers who tend to like selling something different from what they did a year before.

In short, the launch of Granit Ridge Refresh enables AMD to squeeze extra performance from the existing architecture without major investments or requiring partners to release new motherboards (still, the Ryzen 9 9950X3D2 will likely require higher-end platforms anyway). The refresh also acts as a preemptive strike against Intel's upcoming releases, keeping AMD visible in enthusiast and gaming segments that demand every extra bit of performance.

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In a thread, CPU Duke explains that the chip under close scrutiny was kindly donated by a computer museum called the ENTER Technikwelt in Solothurn, Switzerland. The donation apparently came with a request that CPU Duke create some die shots of the early 1970s CPU.

Importance of the Intel 8008

The Intel 8008 was a milestone development as the chipmaker’s first 8-bit microprocessor. It was designed in 1971 by more or less the same team behind the i4004, with the new i8008 chip being released in April 1972. This sample was fabricated on the 10 micron PMOS process in Barbados. CPU Duke confirmed that this CPU was indeed manufactured in the Caribbean island nation, where Intel ran an assembly plant until 1986.

Creating the die shot image

The process behind creating a die shot of a chip like this begins with a little silicon torture. CPU Duke shows the exact moment they ‘decapped’ the CPU here (animated GIF alert) with a screwdriver blade. Ahead of that, they stretched out the CPU’s DIP IC pins to fit in a press, then heated the processor package to around 600 degrees Celsius. With the silicon exposed, it was time to get the imaging equipment ready.

The first imaging step was to take a few macrographs, for a good overview of what was revealed by decapping. Next, the CPU collector reveals that a more detailed survey of the i8008 was created using a “Wild/Leica stereomicroscope with phototube.” Later, the CPU enthusiast got much much closer to create the final image (embedded top), which required the painstaking alignment and stitching of 216 individual micrographs from CPU Duke’s equipment.

What the CPU die shot shows

Without getting too close, some details of the i8008 are already quite clear. Even with the naked eye, you can see the 18-pin bond pad connectors that interface the chip and socket. Also easily visible are markings showing ‘Intel 1971’, ‘8008’, and ‘HF’. That pair of initials is thought to pay tribute to the newest member of the i8008 design team, Hal Freeny. Freeny joined the i4004 team to design this 8-bit CPU.

CPU Duke comments that the 10 micron PMOS structure is actually so coarse that “light microscopy is still feasible.” Zooming closer, the CPU collector notes the visibility of the p-channel MOS structure under the metal surface. Specifically, semiconducting polysilicon is dark green, non-conducting bright green in some of the light microscopy shots shared.

The final stitched micrograph might have been more illuminating had it been color-coded with some kind of overlay. However, computer historian and reverse engineer Ken Shirriff has already shared an overview analysis of the 8008 die. Thus, you can cross-reference that coarser imagery to determine which areas of this fresh new die shot are devoted to the ALU, registers, stack counter, data bus, and so on.

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While this doesn't necessarily confirm anything — after all, we're talking about data-mined information that's not even included in release notes — the timing makes sense. Previously, it was rumored that a potential Ryzen 9000G series was expected to launch in Q4 2025, which lines up with this new BIOS update adding support for Krackan Point.

The last desktop APU release for AMD was Ryzen 8000G, based on Zen 4, while Krackan Point is built using the Zen 5 architecture and employs RDNA 3.5 integrated graphics, offering a substantial performance leap.

That being said, Strix Point is still more powerful, since it's a larger die with more CPU and GPU cores, but that seems to be reserved for mobile for now — though, all hope is not lost.

Just as a refresher: Ryzen AI 7 300 and Ryzen AI 5 300 are Krackan Point, while Ryzen AI 9 300 is Strix Point, and Ryzen AI (9) Max 300 is Strix Halo, but that's an entirely different class of APU. Krackan Point has only three SKUs thus far: the Ryzen AI 7 350 and AI 5 340, both of which are intended for mid-range devices, alongside the Ryzen AI 5 330 aimed at lower-end laptops (that represents Krackan Point 2 silicon).

* rumored; not confirmed.

All of these could translate well to desktop on the AM5 platform, especially considering the power limits would be lifted to 65W (from 54W) to allow for higher sustained clock speeds. The point here is that AMD's mobile options have largely superseded Ryzen 8000G across the board, so an update was long overdue in this department, even if most people would much rather have Strix Point right now. Remember, the primary selling point of APUs (on desktop) is their value proposition, so it makes sense that Strix Point isn't making that jump right away

That's because manufacturers have reported it costing twice as much as Ryzen 8000G, which would make pricing undesirable for the end-user. Still, because the only thing separating Strix and Krackan are core configs and arbitrary naming conventions, there's a chance that both could be combined into a unified Ryzen 9000G series. Regardless, we're at the very least likely getting a potential Ryzen 5 9500G and Ryzen 7 9700G, and if it tops out there then the 9700G's iGPU might actually be a downgrade to the 8700G on paper — since it (Radeon 860M) only has 8 CUs vs 12 CUs on the older model, ignoring the graphics IP differences.

Time will, of course, tell, and we suspect we'll know a lot more about this after AMD's CEO, Lisa, gives the keynote at CES 2026 in January of next year.

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"I think we are up $40 billion since I made that big deal for myself," said President Donald Trump in an interview with Fox News. "They came in to see me, and I say, 'You know what? I think United States should own 10% of your company.' And they gave me 10%. It has been good to them too. Their stock has gone up so much that they end up making a fortune, but we make $30 or 40 billion dollars on that deal. And the same thing with that Mountain Pass. But in that case, it's because we want to get the rare earth refined."

When SoftBank and the U.S. government obtained their stakes in Intel in late August, the company’s stock was trading below book value, which means that the company’s assets were worth more than its market capitalization. While the company had been posting losses for several consecutive quarters and was still not out of the woods, its low market capitalization was generally a reflection of its damaged reputation.

The company has managed to capitalize on 5G, cloud, and HPC megatrends but largely failed to capitalize on the AI goldrush. Nonetheless, Intel still supplies more data center and telco-oriented CPUs than its rivals. The company has yet to become a significant player in the foundry market, and it does not look like Intel Foundry has many major clients beyond AWS, Microsoft, and U.S. defense work.

However, Intel has managed to develop five production nodes in four years and is about to start mass production on its 18A process technology and shift a substantial portion of its production from TSMC to its own fabs. Last but not least, Intel has been losing market share to AMD but remains the world’s biggest supplier of CPUs for both client and data center applications, which is a big deal.

Not a lot has changed since the US government's investment in August: the company is still losing money and market share, all while not gaining a firmer position in the foundry market, which proves the point that Intel’s diminishing valuation was caused by its reputation and business performance rather than its market position and prospects.

Since then, in addition to selling its stake to the U.S. government and SoftBank, Intel has inked a strategic deal with Nvidia under which it will supply data center-grade CPUs for Nvidia’s AI platforms, integrate Nvidia GPUs designed for Intel’s client system-in-packages, and receive a 5% stake from Nvidia. The deal is a huge financial win for the troubled CPU maker and also a significant vote of confidence in the company and its products, as it essentially proves that Nvidia acknowledges the prowess of Intel CPUs in particular and the x86 instruction set architecture in general.

Still, helping Intel survive its current turmoil makes a lot of sense for the U.S. government, as it is largely a matter of national security and industrial sovereignty. Intel is the only American company capable of manufacturing leading-edge logic chips, which are critical for AI, defense, and national security systems.

Backing Intel secures onshore chip production, reduces dependence on TSMC and Samsung in Asia, and advances the longer-term goal of rebuilding the domestic semiconductor supply chain. It also protects a strategic national asset from foreign influence and strengthens America’s position in the global race against China.

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The i386 shipped with 275,000 transistors and ran at up to 16 MHz at launch. Internally, it brought 32-bit general-purpose registers, a flat memory model, and support for up to 4GB of address space, but the bigger change was to the system architecture. Protected mode, virtual 8086 mode, and hardware paging laid the groundwork for real multitasking and virtual memory on x86. Microsoft’s early i386 development kits included demos showing multiple DOS sessions running in parallel, each in its own paged VM. That became a core feature of Windows 3.0 in 1990, under the name “386 Enhanced Mode.”

Compaq was the first company to ship a machine based on Intel’s new CPU, following a rejection by IBM. The Deskpro i386, launched in September 1986, beat IBM to market by nearly a year. This was by design; the company had worked directly with Intel on the chip and had early access to silicon. Prices started at $6,499, and the system became a turning point for the PC industry, whereby Intel made the chip, but Compaq dictated the pace.

Linux, too, was built on an i386. Linus Torvalds’ first kernel release targeted 386-AT hardware explicitly, and his early development notes reference nothing older. The 386’s protected mode and paging features made it possible to build a real Unix-like system without writing elaborate workarounds. Torvalds dropped 386 support from the Linux kernel in 2012, more than 20 years after it launched.

Intel followed the i386 with the i486 in 1989, but the architecture stuck around for decades in embedded systems. The company didn’t end production of the chip until 2007. IA-32 — the i386’s instruction set — remained the backbone of Windows and most Linux distributions well into the 2010s.

Ultimately, the i386 wasn’t just a faster 286. It made x86 viable as a protected, multitasking software platform, something it had never been before. 40 years later, its core design still shows up in emulators, VMs, and legacy boot environments. The original chip might now be long gone, but the architecture it defined isn’t going anywhere.

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The M5 iPad Pro scores 4,138 points in the single-core test, outperformed by the M5 MacBook Pro, which scores 4,263 points. That's not too bad, but the real jump is observed in multi-core results, where the M5 MacBook Pro scores 17,862 points versus the iPad's 16,366 — constituting a 9% difference in performance. That's with the same 10-core base configuration on either device, but the MacBook does have active cooling and a much thicker chassis that can prevent thermal throttling and allow the chip to boost higher, sustaining that for longer periods of time.

It's easy to see why a fully-fledged "pro" laptop would outperform a thin (albeit overkill) tablet, even though they carry the same quality silicon under the hood. Apple never actually discloses clock speed numbers in its tech specs, but in the Geekbench listings, we see that the iPad Pro's M5 ran at 4.43 GHz, while the MacBook Pro's M5 topped out at 4.61 GHz. So, this doesn't necessarily equate to chip binning, but more so the enhanced cooling factor.

More importantly, though, these numbers are enough to beat the recently-launched Snapdragon X2 Elite Extreme, which scored around 4,080 points in the single-core Geekbench test, meaning the M5 in even the iPad is faster — and that's using official Qualcomm numbers. Moreover, compared to the M4, the new M5 is almost 10% ahead in single-core performance, and around 15% faster in multi-core performance versus the newest M4 MacBook Pro listing on Geekbench.

Compared to PC chips, the M5 is only behind a few single-core listings on Geekbench, if we count the best results, which makes sense considering how there's literally only one M5 MacBook Pro score right now, so it's quite cherry-picked. This also serves as your disclaimer for taking all these numbers with a grain of salt, since the sample size is simply too low at the moment to jump to any conclusions.

Intel's Core i9-14900KS scores 4,457 points in the single-core test, making it 4.6% faster. The current-gen Core Ultra 9 285K isn't far off at 4,306 points, rendering the M5 only about 1% slower. AMD's fastest chip on Geekbench is actually the midrange Ryzen 5 7600 with 4,226 points, but that test is deemed invalid; therefore, both the 9950X and the 9800X3D take the top spot, with 3,616 (and 3,615) points — which the M5 comfortably bests.

In multi-threaded performance, though, the M5 gets absolutely shredded across the board, and that's because it simply doesn't have enough cores to stack up to the AMD and Intel flagships. However, this could change with the higher spec'd 14-core M5 that hasn't been tested yet, and we'd assume the M5 Pro and M5 Max will certainly help level the playing field in this regard. The table above uses numbers from Geekbench's processor benchmark database to paint a more accurate picture, alongside the extreme differences we mentioned earlier.

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Danawa (via Harukaze5719), a renowned Korean price-tracking and comparison platform, shows that the cost of the Core i3-14100F has escalated by 15% from late September to mid-October. Concurrently, the prices of the Core i5-14600KF and Core i5-12400F have risen by 13% and 11%, respectively. Additionally, the cost of the Core i5-14400F has increased by 6%.

Similar price increases have occurred in the Japanese market. The news outlet GAZ:Log reported that the Core i3-14100 and Core i3-14100F are selling for 10% and 2.6% more, respectively. Meanwhile, popular Core i5 SKUs, such as the Core i5-14400 and Core i5-14400F, have increased by 20% and 11%, respectively. The higher-end SKUs, particularly those from the Core i7 and Core i9 lineups, have minor price fluctuations of around 5%.

Intel 12th, 13th, and 14th Generation Processor Price Hikes

Although the Core Ultra 200S (codenamed Arrow Lake) processors have been available on the market for some time, there likely remains considerable demand for previous-generation processors. Subpar performance and elevated prices have somewhat deterred consumers from adopting Intel's Arrow Lake series. A significant aspect of Intel's Arrow Lake marketing strategy has heavily emphasized AI. Yet, it is evident that not all consumers find this aspect compelling enough to justify upgrading to Arrow Lake.

Increasing prices for Alder Lake and Raptor Lake may potentially enhance Intel's profit margins. The chipmaker is manufacturing these chips using the Intel 7 process node, which is now fully mature and likely operating at full capacity. Conversely, Arrow Lake relies on a variety of external process nodes supplied by TSMC, so there is limited wiggle room for pricing flexibility. Therefore, instead of lowering prices for Arrow Lake, it is more feasible for Intel to elevate prices for processors produced on its in-house nodes, which it directly controls. Arrow Lake prices have improved since the launch; however, we suspect that the sales are not exceptional.

Intel has not increased prices across its entire Alder Lake or Raptor Lake product lineup; instead, it has done so exclusively for strategic SKUs, particularly the most popular mid-range SKUs, such as the Core i5-14400 and Core i3-14100F. These categories of SKUs generate the highest sales volume for Intel, which likely explains why they are the ones experiencing the most significant price increases in international markets.

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256 cores per chiplet

The biggest news is that Tachyum's Prodigy processor will adopt a multi-chiplet design and each compute chiplet within that system-in-package (SiP) will feature 256 universal cores (up from 192 cores earlier this year, and from 128 cores initially). This suggests that the whole SiP will offer significantly more cores to fulfill the company's promise of '3X the performance of the highest-performing x86 processors, and 6X the performance of the highest-performing GPGPU for HPC.' There is a problem with this performance promise, however: the company still has not frozen specification of the CPU and, consequently, has not taped out the chip, so its actual performance remains to be seen. 

"With the capital raised from this latest funding round, we are able to get complete Prodigy tape-out with the latest innovations and designs to meet ever-changing market demands," said Dr. Radoslav Danilak, founder and CEO of Tachyum. 

Tachyum will use the proceeds from its Series C financing round to finance finalizing the tape-out process and schedule. Tachyum intends to disclose 'upgraded specifications and performance' of its processor shortly — it hasn't revealed when, exactly, but we can make an educated guess that it will happen sometime in 2027.

Commercial shipments will probably start in 2027

Once funding is received (expected within a month), Tachyum can finalize RTL and physical design — assuming it does not add anything to it, run final validation, and tape out the Prodigy chip. Because Prodigy is expected to be made with TSMC's 5nm-class process technology, Tachyum will get the first silicon in 4 – 4.5 months (depending on how complex the design is, and how lucky the company is after sending in the GDSII file to its production partner — as it will take 1 – 1.5 months to write photomasks and then around three months to build the first wafer / wafers). If Tachyum submits its GDSII file to its manufacturer on Nov. 1, 2025, it will get its silicon in Feb. or March 2026. 

After laying their hands on the silicon, Tachyum engineers will bring up and validate the design to ensure that it functions as intended, and then tune firmware. If the chip works as planned, the process will be complete in six to seven months — sometime in Aug. 2026 (at the earliest), or Oct. 2026 if we're being conservative. Once engineering samples meet target specifications, Tachyum can supply them to early customers and partners receive for their evaluation and validation, which might take another 2 - 3 months. If everyone is happy with these samples, Tachyum will likely initiate mass production of its Prodigy in early 2027. 

If everything is fine with production ramp of the Prodigy processor, commercial shipments could begin in mid-2027. This timing aligns with Tachyum's mention of a potential IPO in 2027 — likely planned to coincide with the initial revenue from Prodigy.

If Tachyum manages to release its Prodigy CPUs commercially in 2027, this will be the longest-developed processor in recent times — its development will have taken about 10 years. Prodigy was initially targeted for tape-out in 2019 and launch in 2020, but the schedule slipped repeatedly: first to 2021, then to 2022, 2023, 2024, 2025, and, now, the company is looking forward to get the first samples of its chip in 2026. But the company is still optimistic about its development despite these setbacks.

"We are seeing how the battle for AI supremacy is currently being waged and we are excited to bring to market a disruptive chip that will enable AI models with parameters many orders of magnitude larger than the synapses of the human brain at an affordable price at a fraction of cost of existing solutions," said Danilak.

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“M5 ushers in the next big leap in AI performance for Apple silicon. With the introduction of Neural Accelerators in the GPU, M5 delivers a huge boost to AI workloads,” Apple Senior Vice President of Hardware Technologies Johny Srouji said. “Combined with a big increase in graphics performance, the world’s fastest CPU core, a faster Neural Engine, and even higher unified memory bandwidth, M5 brings far more performance and capabilities to MacBook Pro, iPad Pro, and Apple Vision Pro.”

Although it still uses 3nm technology from TSMC, the N3P process node used on the M5 (versus N3E on the M4) delivers improved capability through slightly higher transistor density. The company says that it has four times the peak GPU performance when it comes to AI processing over the M4, and that it offers up to 45% better graphics quality, plus third-generation ray tracing capability. There’s also a 30% bump in memory bandwidth, with the speed going from 120GB/sec to 153GB/sec in the M5, and, of course, a 15% improvement in multithreaded performance.

Apple’s press release mostly focuses on the chip’s better performance in artificial intelligence workloads, but we’re also hopeful that these numbers will translate to a better gaming experience on the Mac. Unfortunately, we don’t know how the chip will perform compared to its competitors from AMD and Nvidia in the 14-inch MacBook Pro, as we haven’t seen benchmarks yet. However, a leaked Geekbench result of an M5-powered iPad Pro showed the base M5 matching the M4 Max and beating every other competitor in the single-core test.

Those who want to be on the latest, cutting-edge Apple hardware can now pre-order the Apple M5 chip inside the MacBook Pro, iPad Pro, and Apple Vision Pro. The company expects these devices to ship on the 22nd, with in-store availability arriving on the same day.

Those who are already on Apple M3 or newer should wait for third-party benchmarks to appear, just so they know if the M5 is worth upgrading to or if they should wait a couple more years. We also don’t have the Pro and Max versions of the M5 (or the M4 Ultra) just yet, but the company typically waits a few months before releasing them to the public.

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The chip in question is OpenAI’s in-house AI accelerator, part of plans announced on October 13 to deploy custom AI accelerators and rack systems in collaboration with Broadcom. The SoC, specialized for inference workloads, is expected to enter production in late 2026 and scale up to support roughly 10 gigawatts of compute capacity between 2026 and 2029. The Broadcom accelerator, said to be fabricated by TSMC, has been in development for roughly 18 months.

According to The Information, Arm’s new role goes well beyond supplying architectural blueprints. The company has recently started designing and manufacturing its own CPUs rather than just licensing cores to partners, and sees the OpenAI contract as a chance to expand its server ambitions. People familiar with the discussions told the outlet that OpenAI could use the Arm-designed CPU not only with its Broadcom chip, but also with systems from Nvidia and AMD.

The potential revenue from OpenAI’s CPU program could reach into the billions, the report also said, representing a major windfall for SoftBank, which owns nearly 90% of Arm and has borrowed heavily against its stake. SoftBank has also pledged to invest tens of billions of dollars into OpenAI’s data center build-out and to buy AI technology from the startup to help accelerate Arm’s own chip development cycle.

Together with earlier agreements with Nvidia and AMD, OpenAI says its chip programs now total as much as 26GW of planned data center capacity. If successful, OpenAI’s custom chip deployments could reach a total installed base that analysts estimate could cost more than $1 trillion in construction and equipment in tandem with its Nvidia and AMD purchases.

The OpenAI–Broadcom chip could also give the ChatGPT developer more leverage in pricing talks with Nvidia, whose H100 and forthcoming Blackwell GPUs still dominate the AI training market. If Broadcom and TSMC can scale production, OpenAI’s inference chips may offer a partial hedge against the tight GPU supply that has constrained AI labs for much of the past year.

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Panther Lake-H (Core Ultra X 300H)

-Intel Core Ultra X9 388H
-Intel Core Ultra X7 368H
-Intel Core Ultra X7 358H
-Intel Core Ultra X5 338H

Panther Lake-H (Core Ultra 300H)

-Intel Core Ultra 9 375H
-Intel Core Ultra 7 355H
-Intel Core Ultra 7 345H
-Intel Core Ultra 5 325H

Panther Lake-U (Core Ultra 300U)

-Intel Core Ultra 7 360U
-Intel Core Ultra 5 350U
-Intel Core Ultra 5 340U
-Intel Core Ultra 3 320U

If we connect the dots, the smallest of the three Panther Lake SoCs could go on to become the Panther Lake-U variant. Based on existing materials released by Intel, this series is set to feature a 4P+4E core configuration similar to Lunar Lake, with 12MB of shared L3 cache and an Xe3 GPU offering up to four Xe cores. It also supports DDR5 SODIMMs or LPCAMM modules up to 6800 MT/s, as well as soldered LPDDR5X memory running at up to 6400 MT/s.

The mid-size configuration likely corresponds to the Panther Lake-H series, which features a 4P+8E+4LPE core setup, with up to 18MB of shared L3 cache. While it retains the same 4 Xe Core GPU as the smaller variant, the higher core count and larger cache suggest higher performance potential. Additionally, this tier supports DDR5 at speeds up to 7200 MT/s and LPDDR5X at up to 8533 MT/s.

Lastly, the Core Ultra X-branded Panther Lake-H could correspond to the high-end SoC, which features a similar 4P+8E+4LPE CPU core configuration but with a more powerful 12 Xe3 Core GPU for enhanced graphics performance. Notably, this chip has more limited memory options, which aim to deliver adequate memory bandwidth for the GPU. As per Intel, this tier will support LPDDR5X memory at 9600 MT/s.

Intel is expected to officially confirm the final SKUs for Panther Lake later this year, with the first wave of products anticipated to ship before the end of 2025, and a broader availability starting next year. However, the early listings offer an early indication of how the lineup could be structured across performance (H-series) and efficiency (U-series) tiers. Additionally, the mention of previously leaked Core Ultra X models suggest that Intel plans to reserve the “X” branding for its top-tier performance chips.

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The new cross-vendor capabilities agreed upon by AMD and Intel are ACE (Advanced Matrix Extension) and AVX10 to enhance the performance of matrix multiplication and vector operations, as well as FRED (Flexible Return and Event Delivery) and ChkTag (x86 Memory Tagging) to reduce latency between software and hardware, as well as to detect errors like buffer overflows or use-after free bugs.

Intel's Granite Rapids processors already support AVX10.1 and AMX, whereas Sapphire Rapids were first to support AMX instructions. With the ratification by the x86 EDA, AVX10 and AMX will be supported by AMD's next-generation processors, though we can only wonder whether this will happen with Zen 6 or already with Zen 7. Other capabilities are less well-known.

Intel introduced FRED publicly in 2023, and by now, the capability is well-documented in developer documentation. The technology is described as a replacement for traditional x86 interrupt and exception mechanisms, so ultimately it is designed to simplify context switches, reduce latency, improve performance, and security when working with operating systems that support it.

FRED speeds up how the CPU switches between user mode (ring 3) and kernel mode (ring 0) with a hardware-defined entry and exit path. While this does not sound too impressive, replacing the old x86 mechanism (which uses the Interrupt Descriptor Table and IRET) is a big deal. At present, every time an application interacts with the OS (which happens millions of times per second), the CPU must switch between user mode and kernel mode, which introduces fairly high latencies with today's machines. Since the traditional IDT and IRET mechanisms are software-managed, while FRED provides a hardware-defined and verified entry and return path, replacing the former with the latter also improves reliability and security, in addition to performance

Up until today, AMD's stance on FRED was unclear, but now that the feature is recognized by the x86 EAG as a cross-vendor capability, it will be added to AMD's platforms over time.

Perhaps the most interesting addition to the list of cross-vendor x86 EAG features is the ChkTag (x86 Memory Tagging) capability, which has not been widely discussed before. The feature is added to catch memory safety errors — problems like buffer overflows, use-after-free, and out-of-bounds memory access — directly in hardware. Memory tagging is rapidly becoming a standard feature in modern CPUs as it is valuable (can catch a variety of bugs in hardware) and easy to implement, which is why modern processors from Apple and Ampere now support Arm's MTE technology.

It is hard to say when AMD and Intel plan to implement ChkTag (x86 Memory Tagging) in their processors. The announcement by the x86 Ecosystem Advisory Group signals both are committed to supporting this feature, but there is no obligation to implement it within a certain timeframe. Meanwhile, hardware changes of this depth typically require building them into the CPU microarchitecture itself, so expect support of FRED and ChkTag to come several years down the road.

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While the official start of 18A production is a win for the company, as it is technically the first with a 2nm-class node in production, it still faces a potent foe in TSMC — the new node merely represents catching up rather than taking the lead. Here's how the two nodes stack up.

Intel 18A vs. TSMC's N2

Intel's 18A (1.8 nm-class) fabrication process is one of the key features of the company's next-generation Panther Lake platform, serving as both its technological showcase and strategic milestone.

The 18A production node itself is designed to prove that Intel can not only create a compelling CPU architecture but also manufacture it internally on a technology node competitive with TSMC's best offerings. The node is also the first 1.8 nm-class (or, as Intel brands it, 2 nm-class) process to enter high-volume production anywhere in the world, preceding TSMC's N2 by weeks or even months.

18A employs Intel's RibbonFET gate-all-around transistors and PowerVia backside power delivery, two technological breakthroughs implemented simultaneously. Intel de-risked these two innovations separately in different internal nodes, but implementing them simultaneously for the first time in a production node is still a somewhat risky move intended to demonstrate that Intel can leap forward and introduce these innovations at once.

*Chip density published by TSMC reflects 'mixed' chip density consisting of 50% logic, 30% SRAM, and 20% analog.
**According to TechInsights.
*** According to WikiChip.

Analysts believe that Intel's 18A will lead the industry in terms of performance and power efficiency. However, TSMC's N2 is projected to offer considerably higher high-density (HD) standard-cell transistor density (313 MTr/mm^2) compared to Intel's 18A (238 MTr/mm^2), according to reports.

While most modern designs use a mix of high-density (HD), high-performance (HP), and low-power (LP) standard cells, higher HD transistor density could still mean lower per-transistor costs for the foundry. However, it is unclear whether these savings will be passed on to the company's clients.

Furthermore, it should be noted that when comparing the transistor density of Intel's 18A, which features a backside power delivery network, with TSMC's N2, which uses a traditional frontside PDN, the comparison is not entirely accurate. Intel's 18A leaves the front side almost entirely for signal interconnects and logic transistors, whereas TSMC's N2 uses plenty of transistors on the front side for power distribution (power-gating header/footer switches, ESD, MOS decaps, on-die regulators, etc.). As a result, 18A's and N2's effective transistor densities could be very close.

However, flipping the wafer and producing a power delivery network on the backside costs money, so Intel's 18A is likely a more expensive process technology to fabricate than TSMC's N2, which will not be a problem for premium products, though.

While 18A looks good in general on paper, the competitiveness of Intel's Core Ultra 3 'Panther Lake' and Xeon 6+ 'Clearwater Forest' is an important step for Intel toward regaining manufacturing credibility and attracting external foundry customers for 18A, 18A-P, and future 14A nodes.

Production slip and Intel 18A yields

Intel says Panther Lake's compute tiles on 18A 'began early production' at its development and low-volume fabs in Oregon, and 'is now ramping toward high-volume production in Arizona.' As expected, Intel first began to ramp Panther Lake manufacturing at Fab 52. Apparently, Fab 62 is still under construction and will be ramped up when demand for 18A picks up.

The first Panther Lake CPU model is 'slated to ship before the end of the year and broad market availability starting January 2026.' Such an announcement signals a delay, as originally Intel indicated the availability of Panther Lake processors in 2025. Furthermore, the announcement may also highlight a slower-than-expected volume ramp, as the company previously indicated that additional Panther Lake models (not just the halo SKU) would be rolled out in the first quarter of 2026. This time around, Intel didn't reveal when it expects the whole Panther Lake product lineup to ramp up.

The delay of Intel's Panther Lake launch and the slower ramp of its 18A process may suggest that the node may have yield, performance variability, or packaging challenges. However, Intel presented a defect density (D0) graph showing their consistent decrease. Taking a page from some of its rivals, Intel did not mark the Y-axis of the graph, so all we know is that 18A's defect density decreased from 0.4 defects per square centimeter in Q3 2024 to somewhere below that figure in Q3 2025.

While D0 is an important metric, it does not significantly relate to parametric yields, which define whether a chip achieves its desired performance and power targets. For example, a chip can be defect-free but still fail to meet performance or power targets due to a narrow process window, systematic or random critical dimension (CD) variations, stochastic line-edge roughness (LER) variations, transistor mismatch, or marginal design corners.

Intel stresses that 18A yields (we presume, the yields of Panther Lake's compute tile) are equal or better than those of chips produced on previous-generation nodes in the last 15 years, though it is logical that a relatively small compute tile of Panther Lake (100 – 110 mm^2) has higher functional yield of rather big monolithic CPUs from 2012 – 2018 (122 mm^2 – 160 mm^2 ) and large monolithic CPUs from 2018 – 2022 (180 mm^2 – 276 mm^2).

Anyway, despite an earlier delay, Intel's 288-core Xeon 6+ 'Clearwater Forest' data center is still on track for launch in the first half of 2026, which suggests that the issues (if there are issues) are identified and are on track to be solved in the next nine months.

Strategically, even though some may argue Intel 18A was successful due to Intel's goalposts being defined as when the node was 'production ready' as opposed to when it began production, the delay weakens Intel’s credibility in its 'five nodes in four years' roadmap and diminishes its opportunity to leap ahead of TSMC's N2, which is expected to enter high-volume production in Q4 2025 and ramp numerous client and data center products in the first half of 2026. As a result, instead of a clear process leadership win, Intel risks being perceived as merely catching up.

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These sorts of improvements are badly needed because, in recent years, Intel has faced a triple threat in the laptop processor market. AMD, Qualcomm, and Apple all want a piece of the lucrative premium laptop pie, and especially in the case of Qualcomm and Apple, the arrival of high-performance, highly efficient Arm cores on SoCs boasting powerful NPUs and GPUs has forced Intel to up every part of its game to stay competitive on performance and battery life.

Meteor Lake and Lunar Lake Core Ultra CPUs proved that relatively short battery life wasn't an inherent problem of Intel x86 products, but the highly integrated design of Lunar Lake SoCs (combining both compute and memory on a single package) meant that laptop OEMs didn't have nearly as much flexibility and control over system configurations and costs as they might get with a Meteor Lake or Arrow Lake CPU and discrete memory packages, whether in soldered or SO-DIMM flavors.

In exchange for that greater flexibility in memory configurations, Arrow Lake-H SoCs come with tradeoffs of their own. Arrow Lake systems certainly don't have bad battery life, but Lunar Lake is still the best thing going for unplugged efficiency from Intel CPUs.

Lunar Lake also includes a GPU built on Intel's latest Xe2 graphics architecture, while Arrow Lake-H CPUs use an older, larger Xe-LPG+ GPU, which has its roots in first-gen Arc Alchemist products, to deliver relatively similar performance (but likely with worse power efficiency).

Arrow Lake-H also carries over Meteor Lake's rather limited pair of Crestmont E-cores in its low-power island, even as its on-die E-cores got an upgrade to the more advanced Skymont microarchitecture that also underpins the quartet of low-power E-cores on Lunar Lake. Are you lost yet?

This dizzying mix of performance levels, power efficiency targets, architectural generations, and system configuration restrictions across Intel mobile platforms is a headache for consumers and laptop makers alike.

Enter Panther Lake, the great unifier that Intel hopes will bring the best of Lunar Lake's power efficiency improvements and Arrow Lake's performance scalability together in one common package.

Panther Lake SoCs are all built up from the same cutting-edge P-cores, E-cores, and iGPU architecture, while affording laptop makers more freedom to tailor their products to a wider range of buyers and price points. And as Intel's first product to ship with a compute tile fabricated on the latest 18A process node, Panther Lake has a ton to prove.

At its most recent Tech Tour event, held in the backyard of its leading-edge fabs in Chandler, Arizona, Intel walked us through everything that makes Panther Lake tick. Here’s the story so far.

Intel's 18A process ramps up

Panther Lake's compute tile is one of the first products to be fabricated on Intel's leading-edge 18A node. As a quick refresher, 18A is Intel's (and likely the industry's) first high-volume process to incorporate two major innovations meant to enable future scaling and power efficiency gains: gate-all-around (GAA) transistors, which Intel calls RibbonFETs, and a backside power delivery network, which Intel calls PowerVia.

Intel describes its RibbonFETs as "the ultimate transistor," since their gate structure allows for what the company calls "complete control" over the channel. Compared to FinFETs, whose gate structure doesn't extend to the bottom of the channel and therefore has a "weak point" for controlling leakage current, the RibbonFET gate structure entirely wraps around the channel (as defined by the stack of silicon nanosheets at the heart of the device), minimizing undesirable leakage current when the transistor is off. Among other important characteristics, less leakage current means less energy wasted while a chip is operating.

Intel also claims that RibbonFETs are more flexible for designers than FinFETs. The number of ribbons, as well as their widths, can be adjusted to tailor the transistor's performance characteristics to the needs of a given cell.

PowerVia, Intel's implementation of a backside power delivery network, introduces a second novel approach to chip fabrication. As silicon processes have gotten denser and denser, efficiently routing both signal and power wires above the transistors has gotten more and more challenging as those wires compete for ever more precious real estate.

Instead of building up both power and signal wires above the transistor, the backside power delivery approach first creates the transistors and signal wiring on the front side of the wafer. In the next production step, the wafer gets flipped over, and the back side gets polished away until the transistor contacts are revealed. The power delivery metal layers are then connected directly to the transistors.

Intel says that PowerVia allows for 10% higher density and relaxed routing on the front side of the wafer. For power delivery, the back-side metal layers reduce power loss from the package to the transistor by 30%.

All in all, 18A allows for a 15% higher frequency at the same power as Intel 3 and a 1.3x density improvement compared to the same process. Designers can also choose to harness 18A's advances to deliver a 25% power reduction at the same performance level compared to Intel 3.

Cougar Cove P-cores and Darkmont E-cores: evolution, not revolution

Intel didn't go into fine detail on the changes it made to the Cougar Cove P-core on Panther Lake versus Lunar and Arrow Lake's Lion Cove, or Panther's Darkmont E-core versus Skymont. The improvements the company did discuss for the Cougar Cove P-core are typical refinements of an existing CPU architecture, such as an improved branch predictor and a more capacious translation lookaside buffer (TLB). As Intel says, "we didn't go in and change the width, we didn't change the depth, we optimized."

At a high level, Intel says that Cougar Cove now employs an "AI-based" power management approach that can adjust the aggressiveness of certain functional units, such as the prefetcher, on the fly in response to the demands of diverse workloads.

Another change in Cougar Cove is improved prediction behavior in some cases of memory disambiguation. As Intel puts it, when a processor is executing a program, it will perform load and store instructions for memory accesses; sometimes those instructions are connected. Cougar Cove has improved logic to predict when a load and store are connected and use that information to schedule the load correctly. When this prediction is correct, it can result in higher IPC.

Intel also notes that the move to the 18A process gave it the ability to grow some fundamental structures in Cougar Cove, and the TLB was one of the primary beneficiaries. A bigger TLB means that more complex workloads run faster and more reliably, according to Intel.

Cougar Cove also carries forward and refines branch prediction changes introduced with Lion Cove in Lunar Lake. Lion Cove featured improved branch prediction algorithms and delivered low-latency predictions even for branches far ahead in the instruction stream. Intel says Cougar Cove incorporates lessons it learned from shipping Lion Cove silicon to improve performance. It refined some branch prediction algorithms and grew the sizes of each level in the predictor to further lower latency. Cougar Cove can also store better metadata about past prediction results to improve accuracy.

Intel says this all means the Cougar Cove branch predictor can deliver lower latency, more prediction bandwidth, and higher prediction accuracy. These improvements positively impact energy efficiency and performance— a more accurate and more responsive predictor means the CPU core spends less time doing wasteful work and more time doing useful work.

Improvements in the Darkmont E-core are also largely evolutionary versus Lunar Lake’s Skymont. As with Cougar Cove, Darkmont can now use a dynamic algorithm to adjust the aggressiveness of its prefetcher to better balance responsiveness and power efficiency in response to the demands of varying workloads.

Like Cougar Cove, Darkmont offers improved branch prediction accuracy. It also saves power in the front end by employing loop stream detection, a technique that allows the front end of the chip to power down during certain instruction sequences. Darkmont also broadens the cases where the chip can employ nanocode sequences to execute complex instructions that traditionally would have been handled by an x86 CPU's microcode engine. Nanocode was introduced in Skymont to improve both performance and power efficiency.

As Intel puts it, the microcode sequencer is a giant ROM that comes into play when certain complex x86 instructions need to be executed. Loading from that ROM is a serial process, and it can only service one decoder at a time, meaning that other front end units will be blocked if they were also to need instruction sequences from the microcode ROM at the same time. Nanocode prevents this blocking behavior by taking some of those microcode instructions and embedding them into programmable logic arrays in each of the three front-end decoders of the E-core.

Since those PLAs are present in each of the three front-ends of the Darkmont core, Intel says the core can run instructions that formerly resided in microcode as "parallel, out-of-order microcode-like sequences." Intel says Darkmont has more cases and more optimized cases where its front-ends can employ nanocode and leave the microcode sequencer alone.

Mix and match

Not every part of a Panther Lake SoC uses 18A, of course. Intel uses the same "disaggregated architecture" concept that debuted in Meteor Lake and was refined on Lunar Lake and Arrow Lake. This approach separates different functional units of an SoC into individually fabricated "tiles" that are made in Intel's own fabs or at foundries like TSMC, then joined together using Intel's Foveros packaging technology.

In turn, each Panther Lake compute tile, fabricated in-house on 18A, is built up from three basic core complexes. A compute tile can (so far) include up to four Cougar Cove P-cores, up to eight Darkmont E-cores, and a separate "low-power island" cluster of four more Darkmont E-cores that are meant to "confine" suitable workloads to a lower-power compute domain for extra battery life, an idea introduced in Meteor Lake and refined further in Lunar Lake.

Meteor Lake and Arrow Lake both relied on a pair of Crestmont E-cores in this island that were limited in both power and clock speeds to maximize energy savings, but their limited performance meant that more power-hungry parts of the chip might be awakened more often if a task exceeded their limited capabilities. Lunar Lake got four Skymont E-cores in this island with their own power rail, which allowed them to be clocked higher and do more demanding work before tasks had to be shifted to the P-cores on that SoC.

As an evolution of Skymont, Panther Lake's Darkmont low-power E-cores allow more demanding tasks to stay confined to the low-power island for longer, and they can contribute to multi-threaded workloads for extra parallelism when it's needed. They're not on the main ring bus that connects the main clusters of P- and E-cores on the Panther Lake SoC, however, so they don't share the L3 cache of the larger core cluster. Instead, they have access to a power-efficient 8MB "memory-side cache" that's shared with all the other compute agents on the tile.

This side cache is coherent with the rest of the cache hierarchy across the chip, and coherence among all the caches on Panther Lake is managed by a home agent that communicates with separate coherency agents on each compute domain.

The 18A compute tiles also include Intel's fifth-generation NPU, seventh-generation image processing unit (IPU) for use with premium webcams in laptops, and Xe media and display engines separated from the graphics tile.

For more information on the Xe3 graphics architecture and the two iGPUs that use it on Panther Lake, as well as software and power management improvements, check out our dedicated article.

Three's a crowd

So far, Intel has created two different 18A compute dies that it mixes and matches with two different integrated GPUs (and possibly two different I/O tiles) to create three distinct Panther Lake SoCs, each with different cost and performance targets.

The smallest Panther Lake SoC has four P-cores paired with four low-power E-cores, just like we saw with Lunar Lake. Intel didn't disclose the full specs of its cache hierarchy, but since it lacks higher-power E-core clusters with their own L3 cache, our educated guess is this chip likely only has 12MB of cache shared across its four P-cores. It includes a small Xe3 GPU that offers up to four Xe3 graphics cores. This chip can use traditional DDR5 SO-DIMMs or LPCAMM modules at speeds up to 6800 MT/s, or soldered LPDDR5X running at up to 6400 MT/s.

For storage and peripheral controllers, the platform controller tile on the baby Panther Lake SoC offers 12 PCIe lanes - four Gen 5 and eight Gen 4 - which is enough to connect a Gen 5 SSD and perhaps lower-end storage devices or a discrete GPU. Between its relatively low core count, modest graphics horsepower, and limited memory speeds, we're likely to see this chip in more entry-level laptops that prioritize light weight and battery life over absolute performance.

The midsize Panther Lake SoC adds eight E-cores on a ring bus shared with the four P-cores, in addition to the four low-power E-cores in their dedicated island. Intel says this compute die has up to 18MB of shared L3 across the P- and E-cores. This midsize SoC keeps the same 4 Xe Core graphics tile as the small SoC.

This chip can take advantage of faster memory than its smaller sibling. Like the small chip, it can use both DDR5 modules or soldered LPDDR5X, but it supports DDR5 at speeds up to 7200 MT/s and LPDDR5X at up to 8533 MT/s.

The midsize Panther Lake chip also has expanded PCIe connectivity from its larger platform controller tile: as many as eight PCIe Gen 4 lanes and 12 Gen 5 lanes. Intel wouldn't comment on particular Panther Lake OEM designs in the pipeline, but between its expanded compute resources, richer PCIe connectivity, and support for higher-speed memory versus its smaller sibling, this chip seems well-suited for pairing with a discrete GPU in thin and light laptops, an approach that some Intel partners took with Meteor Lake chips.

The largest Panther Lake SoC retains the same 4P+8E+4LPE CPU core configuration as the midsize SoC but adds a much larger and more powerful 12 Xe3 Core GPU to the package. Intel restricts the memory options that partners can employ with this chip, likely so that it can get adequate memory bandwidth to feed all of those GPU execution units. It can only use LPDDR5X memory and supports the fastest transfer rates of any Panther Lake product: up to 9600 MT/s.

This big chip drops back to the more limited I/O tile with eight PCIe Gen 4 and four PCIe Gen 5 lanes, which is likely an indication that it's targeted at the exploding handheld gaming market and premium thin-and-light laptops that can still game when needed. Pairing discrete GPUs with this version of Panther Lake doesn't make a ton of sense from a system design standpoint.

Performance projections

Intel offered a high-level preview of single-threaded performance with Cougar Cove, suggesting that the new P-core can deliver 10% higher performance at similar power to Lunar and Arrow Lake, or 40% lower power at similar performance in less demanding workloads.

The multi-threaded performance story for Panther Lake is a bit muddier. Intel claims that Panther Lake can deliver 50% more performance at similar power to Lunar Lake, or 30% lower power for multi-threaded performance similar to Arrow Lake-H.

Of course, if we consider these charts in their entirety, Panther Lake can also deliver higher absolute performance at similar power to Arrow Lake-H, emphasizing the greater performance scalability of what we assume to be the 4P+8E+4LPE package.

Beyond these broad and rosy performance projections, Intel didn't discuss any specifics on clocks or power targets for Panther Lake during its presentations, but as with any modern laptop SoC, the frequency, power and thermal targets for these chips are likely to cover such a broad range of designs that it's hard to make generalized statements about their performance, and that's before we get into individual chip models within the product stack.

We'll have to wait and see what types of systems Intel's partners typically produce with Panther Lake SoCs inside before we can even begin to establish performance ballparks. Intel says that the first Panther Lake chips will ship before the end of 2025, and that it expects broad market availability starting in January 2026. Given that timeframe, it's probably safe to say that we will hear much more about Panther Lake products at CES.

Intel's Xe3 graphics IP will debut on Panther Lake with every SKU featuring integrated graphics. The models with the highest-spec'd iGPUs are what will reportedly be referred to as Core Ultra X. The "X" designation allegedly represents 12 Xe3 GPU cores, a major uplift from the 8 maximum Xe2-based cores we had on Lunar Lake. But that's the thing — Panther Lake is not a Lunar Lake successor because that featured on-package memory; Panther Lake supports externally-mounted RAM. That's probably why the model numbering on Panther Lake is also shifted around.

Speaking of which, Golden Pig Upgrade lists four SKUs: three with the Core Ultra X designation and one without. Apparently, only Core Ultra X9 and X7 are getting the full-fat 12 Xe3 GPU cores, while the Core Ultra 5 midrange offering will have, at best, 10 Xe3 cores. So, overall, Core Ultra X means 12 Xe3 cores; Core Ultra 3x8 means at least 10 Xe3 cores; and Core Ultra 3x6 means less than 10 Xe3 cores. In general, Panther Lake will introduce more CPU cores across the board as well, alongside improved iGPUs, as explained below.

Now, all that being said, there's a slight twist in this narrative. A new leak that surfaced from Chiphell just a couple of hours later actually detailed the entire lineup, consisting of 12 SKUs that will launch this year. From that leak, it appears that there is, in fact, a Core Ultra 5 SKU as well, but it still has those 10 Xe3 Cores we mentioned earlier. This may mean that the "X" designation isn't strictly exclusive to the 12-core club, but this is a leak after all, so we'll have to wait and see. Given the discrepancy in core configs below, perhaps "X" just broadly refers to a high GPU core count.

What's more interesting, however, is how the SKUs are actually named. Instead of the Core Ultra X7 or X9, the "X" appears to precede the model number itself — Core Ultra 9 X388H, for instance. There's rumored information on a lot more models, so we'll leave you with a table (at the end) that goes over it all. It doesn't really matter how Intel names these chips; at the end of the day, we're in for a seemingly powerful upgrade regardless. Especially when it comes to integrated graphics performance, a big generational jump (Xe2-LGP to Xe3-LPG), combined with the increased core count, should give us exciting results.

Panther Lake is expected to be fabricated on the company's homegrown 18A process, and will feature an expanded LP-E island, alongside the typical P-Cores (Cougar Cove) and E-Cores (Darkmont). Intel is looking for a spiritual successor to Lunar Lake, hoping to achieve similar efficiency (battery life) but without the niche novelty tied to that generation. The fact that they're reportedly combining the naming schemes of Core Ultra 200V and Core Ultra 200H (Arrow Lake-H) could be evidence of that, and it should be enough to keep the crowd fed till the real upgrade, Nova Lake, shows up next year.

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During her on-site access, BBC Technology Editor, Zoe Kleinman, talked to the FinalSpark scientists, saw some of the wetware samples – like the infamous mini brain organoids - and discussed the research goals.

As a reminder, organoids are essentially tiny, lab-grown brains. However, they differ from a fully-developed brain by their uniform nature, and consist of just one kind of neural building block that would be present in a human brain.

Developing and maintaining a biocomputer

The BBC explained the process of creating brain organoids: from skin cells to stem cells, which are cultured to become clusters of neurons, which then grow into the organoids used for biocomputing. Kleinman was allowed to handle some dishes containing the organoids, which were described as “several small white orbs.”

In addition to the considerable time required to cultivate organoids, there are other maintenance concerns that are alien to traditional silicon-based computing.

Currently, scientists can’t mimic the way an animal's brain receives nutrition via blood vessels. Though advances have been made, organoids can currently only survive for about four months.

Interestingly, it has been observed that there is sometimes a flurry of activity for 10s before an organoid ‘dies.’ Is it seeing its life flash before its eyes? Despite that parallel, and the knowledge of their organic nature, the scientists dismiss the lives of organoids, “We shouldn't be scared of them, they're just computers made out of a different substrate of a different material,” one researcher told Kleinman.

Organoid applications

In biocomputing, organoid wetware is developed to be “prompted to respond to simple keyboard commands.” Input is made via electrodes, and scientists can monitor brain responses visually on a graph, which is like an EEG machine output. We are still in the early stages of interacting with and prompting organoids. Thus, FinalSpark’s online bioprocessor access is currently touted mainly as an attractive platform for research into biocomputing.

Beyond the FinalSpark labs, the BBC says that other biocomputing firms have cultured artificial neurons to play Pong, for example. Perhaps they are referencing this development, which we reported on a year previously.

Other firms are using these 'mini brains' in a more traditional biological research capacity – checking how new drugs work to combat neurological conditions like Alzheimer's and autism

Refocusing on computing, a lot of the promise of wetware is held in the hope that it will bring brain-like speed and efficiency to processing, particularly with regard to AI. It is currently thought that wetware will ease into the practical computing space to complement, rather than replace, silicon. However, it is still difficult to know exactly what niches wetware will excel in, what its killer app will be...

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Found this Intel Extreme Edition 980 Engineering Sample, Anyone have information on it? from r/intel

Diegunguyman reached out on various Subreddits to try and glean more insight into his find. The basic backstory was that “The only text on the CPU itself was written in Sharpie, just the model number and clock speed, 4 GHz.” With no official documentation to reference, the Redditor turned to experts on Subreddits like r/pcmasterrace and r/Intel to seek answers.

A rare breed

This particular dual-core Hyperthreaded ‘Presler’ P4 is a very interesting sample for a number of reasons. Firstly, the collective wisdom of the flock of attentive Redditors interested in this story indicates that the sample now owned by diegunguyman was likely a loaner chip given to an employee.

These Employee Loaner Chips are rarer than typical Engineering Samples (ES). Their rarity is probably bolstered by the strict terms of the loan. However, a purported Intel ‘insider’ on Reddit indicates that due to the extensive layoffs at the firm, policing of the loaner system has evaporated.

Another interesting aspect of this CPU is the reasons that the public never saw with the pinnacle of NetBurst. It is now a matter for the history books, but the processor line already had a poor reputation for its thermals and performance, which played a part.

Pivot: Plan B becomes Plan A

What likely sealed this ‘ghost’ processor’s fate was Intel’s strategic pivot. Management was already shifting focus to the legendary Core 2 lineup, built on the mobile-first Core microarchitecture. Then we saw Intel’s marketing shift to focusing on the entirely reasonable performance-per-watt metric, and the NetBurst design was quickly relegated to history, with budget / entry-level chips being the primary beneficiaries.

It is probably fair to say Intel’s Haifa design team and its mobile-first Core microarchitecture were Intel’s saviors. From mid-2006, the new performance-per-watt tuned chips managed to effectively stall the momentum of AMD’s contemporaneous CPUs like the Athlon 64 and X2 designs on the desktop.

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Origins

The legal conflict between Arm and Qualcomm began shortly after Qualcomm acquired Nuvia, a startup focused on high-performance Arm-compatible CPU designs for the HPC segment, and promised to build CPUs for consumer PCs based on Nuvia's IP.

Arm claimed that the transfer and use of Nuvia's designs under Qualcomm's umbrella required renegotiation of Nuvia's original architecture license agreement (ALA), as Nuvia had only planned to use the cores in the data center space, whereas Qualcomm had much broader plans for the IP. Qualcomm, on the other hand, maintained that its own existing ALA was sufficient to incorporate Nuvia's work and continue development and deployment of custom cores based on the Arm instruction set architecture. Arm then revoked Qualcomm's ALA in October 2024, citing a violation of the agreement for not renegotiating it after acquiring Nuvia.

Arm opposed Qualcomm's use of Nuvia’s CPU IP across broader market segments, which would include everything from entry-level consumer devices to high-end servers, because it threatened Arm's control over licensing boundaries and its ability to extract additional royalties. Arm likely viewed the transfer of that IP to Qualcomm, followed by its broad deployment across various markets, as a breach of scope, as the original Nuvia agreement had narrower terms.

Furthermore, Qualcomm used Arm's off-the-shelf Cortex cores under a technology license agreement (TLA) license. This provides Arm more control, as well as a per-core license. This clearly hurt Arm's bottom line, as ALA royalties are considerably lower than TLA royalties.

If Qualcomm can freely use Nuvia's custom Arm v8 cores across segments under an existing ALA, it would theoretically enable other licensees to do the same thing. Companies would be able to acquire CPU startups that receive an ALA on certain conditions, then roll them into their own ALA if they have one, and sidestep core-level royalties.

By allowing Qualcomm to integrate Nuvia's custom cores under an existing architecture license, Arm risked weakening its tiered licensing model and losing leverage over other major partners that considered similar custom silicon strategies. Perhaps Arm also viewed Qualcomm's move as a competitive threat to its own Neoverse core roadmap, Neoverse CSS roadmap, and ultimately its processor or custom processor roadmap. Therefore, blocking this reuse was an attempt to preserve both licensing revenue and product relevance in high-performance markets.

In December 2024, a jury sided unanimously with Qualcomm, finding no breach of the Nuvia ALA and confirming the legitimacy of Qualcomm's use of the technology. On September 30, 2025, the U.S. District Court in Delaware reaffirmed that position, dismissing Arm's final remaining claim and denying a request for a retrial. The judgment, now final, delivers Qualcomm a complete legal triumph and blocks Arm from any further recourse in the case. Furthermore, Qualcomm's countersuit against Arm is still pending and expected to go to trial in March 2026.

A green light for Qualcomm's expansion

When Nuvia first introduced its Oryon/Phoenix processor core in 2020, it demonstrated considerably higher performance efficiency than Apple's A13, AMD's Zen 2, and Intel's Sunny Cove, as well as other relevant CPUs over time. After several delays, when the Oryon-based Snapdragon X Elite CPUs hit the market in 2024, they demonstrated competitive performance. However, the Snapdragon X2 Elite processors look considerably more promising, and the launch of the next generation coincides with the legal win.

"This decisive legal victory is monumental for Qualcomm, clearing the path to fully integrate and scale the acquired Nuvia assets under Qualcomm's existing Architecture License Agreement (ALA)," said Neil Shah, VP of Research at Counterpoint Research. "This win provides Qualcomm with significant momentum, enabling them to accelerate the deployment of custom Nuvia-based CPU cores across a much broader spectrum of applications from PCs, smartphones, and automotive to high-performance computing domains like AI servers and even humanoid robotics."

With a better CPU and presumably system-on-chip design, ALA licensing fees, and without legal obstacles and risks, the company can now scale Nuvia cores for a wide range of client (and eventually data center) product categories, including automotive, PCs, and smartphones.

Furthermore, now that it is perfectly legal for Qualcomm to use Nuvia-designed cores, PC OEMs may be more willing to integrate Snapdragon X2 Elite CPUs into their systems, especially considering that Windows on Arm is attempting to gain more traction. Ultimately, this supports Qualcomm’s efforts to challenge the x86 incumbents in the laptop market.

Keeping in mind that Qualcomm also has competitive neural processing units (NPUs) for AI, the company may also introduce new product categories that take advantage of the highly efficient Oryon CPUs and sophisticated NPUs.

And Arm-based custom silicon

Qualcomm's sweeping legal victory against Arm marks an important moment in the semiconductor industry, reaffirming the rights of architecture licensees to develop and scale custom CPU designs without renegotiating terms, which somewhat reshapes the balance of power between IP holders and their partners.

One of the most immediate effects of the ruling is a renewed sense of legal clarity for holders of Arm architecture licenses. Qualcomm’s position that an ALA provides broad design rights, including the freedom to integrate acquired IP, has now been upheld at the highest level. This has implications not just for Qualcomm, but for other major licensees. Companies such as Amazon, Broadcom, Google, MediaTek, and Nvidia have all used custom or semi-custom Arm-based cores in their products.

The precedent set here assures licensees that they can pursue internal development and even acquire CPU startups without facing retroactive restrictions or new licensing demands from Arm. In an era where companies are increasingly seeking to differentiate their silicon at the architectural level, this kind of legal certainty is vital.

Arguably, the verdict also preserves the original intent of the ALA license: to empower chipmakers to innovate freely within the Arm ecosystem and retain Arm as the owner of the ISA. In particular, under a standard ALA license with Arm, licensees can design their own CPU microarchitecture from scratch that runs a specific Arm ISA (e.g. Arm v9), and add internal optimizations, such as specialized execution pipelines, custom data paths, or micro-op fusion techniques, as long as these do not break ISA compatibility. They could even implement custom accelerators or extensions, provided they do not interfere with standard ISA behavior and are not exposed to software that expects strict Arm compliance.

They still will not get as much freedom as they get with RISC-V, as the process of adding to the Arm ISA is complex and takes years. However, companies like Apple canned its custom AMX instruction set with the M4 chipset in favor of ARM's SME.

What about Arm and Qualcomm's relationship?

While Qualcomm has prevailed in the legal fight with Arm, the impact on the latter has yet to be determined. Arm still controls the dominant ISA used across mobile and embedded platforms worldwide, which is gradually expanding into the PC space. Its core IP, software stack, and ecosystem partnerships remain extremely valuable and widely used. But this case has damaged its reputation with one of its largest customers, specifically Qualcomm, which has long been a flagship licensee.

"While Arm's decision to pursue legal action was an understandable measure to protect its business, it was an unfortunate necessity that strained its relationship with a premier customer and partner," Shah said. "Despite this, Arm unequivocally retains the industry's leading low-power architecture, coupled with a robust software and tools ecosystem for computing. Moving forward, Arm must seize the opportunity to mend fences and rebuild trust with Qualcomm.

To avoid a further erosion of trust, Arm may need to shift away from legal enforcement and instead re-establish its relationship with Qualcomm. But the path toward reconciliation remains rocky, as Arm itself is moving toward designing its own CPUs. In fact, this move could make other partners gravitate towards custom designs or alternative architectures.

There's also the question of Qualcomm's countersuit against Arm, which accuses the British company of contract breaches and customer interference. Depending on how that case unfolds in March 2026, the relationship could deteriorate further.

This ruling could define the future of Arm

This court ruling comes at a sensitive time as Arm is increasingly shifting from being just an IP licensor to also designing its own full CPU products. To some degree, the ruling actually helps Arm, as it sets ground rules for holders of the ALA license, showing them the legal boundaries for integrating third-party, custom Arm-compatible silicon into their designs to better compete against Arm's own CSS or even CPUs, while remaining within the Arm camp and not moving to RISC-V.

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Previous leaks have suggested that the Nova Lake family would ship with brand new core micro-architectures, and the latest edition of the ISA Reference document, published by Intel, has just confirmed this. Nova Lake, which will spread across desktop and mobile, will use Coyote Cove P-Cores and Arctic Wolf E-Cores. Updated cores bring IPC uplifts and efficiency improvements — how much so remains to be seen — which are expected to pair with the new LGA 1954 socket for platform improvements, too. Nova Lake may also pack in a new Xe3 GPU tile for integrated graphics.

The flagship Nova Lake-S desktop chip is rumored to feature up to 52 cores, while the mobile lineup will reportedly top out at 28 cores. There were rumors of a Strix Halo competitor dubbed Nova Lake-AX that would mark Intel's re-entry in the booming APU segment, but those have since been put in limbo. Nova Lake will reportedly be manufactured by TSMC for the most part, with at least one tile being fabricated using Intel's own 18A process. It will serve as Intel's direct answer to AMD Zen 6 client CPUs.

On the server side, the Diamond Rapids lineup of Xeon CPUs was recently tipped to use Panther Cove P-Cores. Just as a refresher, Intel is currently running two parallel Xeon families: one shipping with only E-Cores (Forrest designation) and one with only P-Cores (Rapids designation); Diamond Rapids is the latter. Unfortunately, these Panther Cove P-Cores will not bring back SMT to Intel's workstation SKUs, but that will reportedly be addressed with the follow-up Coral Rapids family.

A reference to Panther Cove-X also exists in the documentation, assuming it's a variant of the standard P-Core, but there's no additional info on this. Diamond Rapids will focus on pushing core density, reportedly offering up to 192 cores to compete with AMD's Zen 6-based EPYC lineup.

In the ISA document, there was also a reference to Wildcat Lake, the update to Twin Lake (Alder Lake-N) APUs, confirming that they're on the way as well — currently rumored to launch with Panther Lake as lower-end mobile options, contrasting with Panther Lake's mid-to-high-tier target audience. These will feature the Cougar Cove P-Cores and Darkmont E-Cores (the same as the ones on Panther Lake). That's a lot of bodies of water and animals we've mentioned in one article.

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Intel and AMD did not respond to requests for comment from Tom's Hardware in time for publication.

It makes sense for Intel's former rivals — especially American companies — to consider coming to the table. The White House is pushing for 50% of chips bound for America to be built domestically, and tariffs on chips aren't off the table. Additionally, doing business with Intel could make the US government, Intel's largest shareholder, happy, which can be good for business. AMD faced export restrictions on its GPUs earlier this year as the US attempted to throttle China's AI business.

In general, Intel's Foundry technology is perceived as less advanced than TSMC's, but partnering with Intel could provide a backup if AMD ever needs one.

The latest ruling follows Qualcomm’s trial victory from December 2024, where the company was found innocent. However, at the time, the jury was unable to agree on whether Nuvia violated its licensing terms with Arm.

The dispute centered on Qualcomm’s use of Oryon cores for its Snapdragon X range of client processors based on Arm’s v8 architecture, created by Nuvia for server-grade chips.

Arm claimed that Qualcomm was supposed to renegotiate licensing terms following its acquisition of Nuvia. Additionally, Arm demanded that the designs be scrapped for allegedly breaching Nuvia’s original Arm licenses. Qualcomm, however, maintained that its existing Architecture License Agreement (ALA) for Arm’s instruction set architecture already extended to designs developed by its subsidiaries, including Nuvia.

Following the verdict, Ann Chaplin, General Counsel and Corporate Secretary at Qualcomm, said “With the Court’s decision today, Qualcomm and its subsidiary Nuvia have achieved a full victory. This decision follows Qualcomm’s December 2024 jury trial win and is a full and final judgment in Qualcomm’s favor. Our right to innovate prevailed in this case and we hope Arm will return to fair and competitive practices in dealing with the Arm ecosystem.”

It is interesting to note that the Qualcomm Oryon general-purpose cores found inside Snapdragon X processors are based on Arm’s Armv8 instruction set architecture (ISA). However, it incorporates “one percent or less” of Arm’s own technology according to Gerard Williams III, one of the lead developers of Oryon and former Apple chip designer.

Williams co-founded Nuvia in 2019 with the aim of building high-performance, energy-efficient custom CPU cores for datacenters, known as Phoenix. To do so, the company secured two licenses from Arm, including a Technology License Agreement (TLA) to modify existing cores and an Architecture License Agreement (ALA) to design custom ones. Since Nuvia’s strategy was to pursue custom designs from the outset, the team developed its cores from scratch, relying minimally on Arm’s physical IP.

Qualcomm has stated that a separate lawsuit against Arm is still ongoing. The case involves claims of breach of contract, interference with customer relationships, and conduct aimed at hindering innovation while promoting Arm’s own products over those of long-standing partners. The company added that it expects the trial to begin in March 2026.

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The KH-50000 utilizes Zhaoxin's latest Century Avenue architecture, named after a famous road in Shanghai. The company is fond of naming its architectures after famous locations within Shanghai because, after all, Zhaoxin is a joint venture between VIA Technologies and the Shanghai government. Century Avenue is the current architecture used by the company for its mainstream KaiXian KX-7000 processors; consequently, it is logical for Zhaoxin to align its latest server processors accordingly. Although Century Avenue is an internally developed architecture by Zhaoxin, many speculate that Century Avenue derives from Centaur Technology's CNS core, prior to the company's split from VIA Technologies in 2021.

Zhaoxin utilizes a chiplet design for the KH-50000, similar to AMD's Ryzen and EPYC processors, with a greater emphasis on the latter, given the high number of cores. A chiplet design would enable Zhaoxin to push the core boundary on the KH-50000, effectively matching AMD's EPYC 9004 (codenamed Genoa) series that tops out at 96 cores. Zhaoxin has planned two variants of the KH-50000: the flagship 96-core SKU and a more affordable 72-core SKU, both of which lack simultaneous multithreading (SMT). The KH-50000 represents a monumental leap forward for Zhaoxin, as it provides 3X more cores than the company's existing KH-40000.

Zhaoxin's photograph of the KH-50000 reveals that the chipset layout exhibits minor differences from that of AMD; the core design remains consistent, however. The gargantuan I/O die is centrally positioned on the processor, encircled by four clusters of compute dies. Each cluster contains three compute dies, totaling twelve. Each die incorporates eight cores and 32MB of L3 cache. When assembled, the resulting processor comprises a 96-core configuration with 384MB of L3 cache.

Zhaoxin Kaisheng KH-50000 Specifications

The clock speeds on the KH-50000 aren't too shabby and fall in line with what you'd expect from a server chip. The 96-core variant has a 2.2 GHz base clock and 3.0 GHz boost clock. Since the 72-core chip has fewer cores, Zhaoxin could push the base clock to 2.6 GHz but maintained the same boost clock.

Although the company has taken the wraps off the KH-50000, it didn't reveal the TDP or other power metrics for the upcoming server chip. The thing with a chiplet design is that Zhaoxin can effectively utilize older process nodes for the KH-50000. Sanctions don't hurt as much if you don't care about power consumption.

For comparison, AMD has historically kept its top EPYC chips around the 300-350W range, and that's with SMT. Nonetheless, the chipmaker has recently pushed the power envelope up to 500W, which is understandable when its EPYC processors are maxing out at 192 cores.

In addition to core count, the KH-50000 advances the development of Chinese server processors. It now supports up to 12 channels of DDR5-5200 RAM, allowing for a maximum of 3TB of memory, in contrast to the 2TB supported by DDR4-3200 on the KH-40000. Zhaoxin has added Compute Express Link (CXL) interconnect support. Furthermore, the expansion capabilities of the KH-50000 have enjoyed an upgrade to include 128 PCIe 5.0 lanes and 16 PCIe 4.0 lanes, compared to the 128 PCIe 3.0 lanes available on the KH-40000.

The SATA and USB ports experienced a slight decrease in numbers when comparing the KH-50000 to the KH-40000. However, Zhaoxin has upgraded the latter to support the latest USB 3.2 Gen 2 specification.

The KH-50000 supports x86 32-bit and 64-bit instructions, including SSE4.2, AVX, and AVX2. Support for virtualization is also present. To adhere to China's security guidelines, the KH-5000 supports the country's proprietary SM2, SM3, and SM4 encryption standards. Notably, Zhaoxin has integrated National Technology's fourth-generation trusted computing chip (likely the NS350) beneath the KH-50000, where the contacts are situated. This chip meets the security requirements of China's GM/T 0012-2020 cryptographic module standard and complies with the international TPM 2.0 (SPEC 1.59) standard.

The footprint of the KH-50000 measures 72 x 76 mm, which is considerably larger than that of the KH-40000. Notably, it shares dimensions with AMD's Genoa and Bergamo processors, which measure 72 x 75.4 mm and are compatible with the socket SP5. Therefore, the size of the KH-50000 is precisely the same as that of AMD's more recent EPYC chips.

The KH-50000 slots into a socket with a Land Grid Array (LGA) design, meaning the pins are located on the motherboard rather than on the processor. Zhaoxin's latest server chips are scalable, similar to AMD's EPYC and Intel's Xeon chips. The KH-50000 embraces 2S and 4S systems, where you can accumulate up to 384 cores on the latter. Zhaoxin built its own ZPI (Zhaoxin Processor Interconnect) 5.0 for inter-chip communication.

Contrary to AI GPUs, companies in China can still acquire server chips without significant difficulty, albeit potentially at increased costs. Nonetheless, Zhaoxin continues to make considerable progress in the domestic market, and with Chinese authorities firmly committed to utilizing domestically produced technology, the company could achieve success even if the KH-50000 does not rival AMD or Intel's latest server chips.

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The only specs we have are the cores, threads, and clock speed, featuring the aforementioned 86 cores and 172 threads operating at up to 4.8GHz. But being based on the Granite Rapids architecture, it is very likely that this chip is a much higher clocking offshoot of the Xeon 6787P, which also boasts 86 cores across two compute tiles, but peaks at a 3.8GHz peak turbo clock speed.

At 86 cores, this new chip is approaching the core count of AMD’s current Threadripper flagship, the 9995WX with 96 Zen 5 cores. This SKU might not even be the flagship part since Granite Rapids can scale up to 128 cores. Only time will tell if this is the case — to reach 128 cores, Intel has to use three compute dies, whereas with its 86-core Granite Rapid SKUs, it only needs to use two. Limiting Granite Rapids-WS to 86 cores has the potential to reduce manufacturing costs for Intel.

Rumors have been circulating about a workstation-offshoot of Granite Rapids for months. In February, we covered a Granite Rapids-W leak, allegedly stating these new workstation parts will come with up to 128 PCIe 5.0 lanes, feature eight-channel DDR5 memory support, and support Intel’s outgoing W890 chipset.

Granite Rapids is Intel’s latest generation server architecture, and one of its most competitive yet, featuring core count parity with AMD EYPC processors for the first time since 2017, when it launched in the Xeon 6900P series late last year. Similar to Arrow Lake-S, Granite Rapids is based on a tile-based architecture, featuring several I/O and compute tiles to reach previously untouchable core counts.

Intel hasn’t had a serious CPU lineup that has been able to compete with AMD’s Threadripper WX-series parts over the past two generations. Its outgoing W-3500 Sapphire Rapids Refresh chips only scale up to 60 cores, while AMD has had 96-core trims since the Threadripper 7000WX series and 64-core chips dating all the way back to the Threadripper 3000 series. With Granite Rapids-WS, Intel has its first opportunity in years to approach or outpace AMD on core count in the HEDT/workstation segment, similar to the server market.

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Both the A19 and A19 Pro benchmarked within the margin of error of each other; however, officially, it was the regular A19 that posted 5,149 points to claim the single-thread performance crown. The A19 Pro scored 5,088 points, which makes sense considering both chips share the same cores, just differing amounts of them. The A19 beats heavy hitters like Apple's own desktop-class M3 Ultra (both 28- and 32-core variants), Intel's Core Ultra 9 285K, and even the EPYC 4585PX from AMD — all of which would be actively cooled.

The tweet caption lists nominal TDPs of these chips for comparison, but that's not what a single-core load would actually use. Since it's incredibly difficult to pinpoint that, PassMark itself estimated the single-threaded power consumption in a reply, saying the A19 is likely using 4W, the 285K is using 44W, and the EPYC is using 56W. Even if those 1/3 assumptions are wrong, the delta is so high between the three that it doesn't really matter. The A19 is miles ahead in terms of efficiency.

Where it falters, of course, is multi-threaded performance. It doesn't scale upward when you take more/all cores into account, but that's to be expected with a mobile-only chip, given that it simply has fewer cores than every other CPU on the list. Moreover, keep in mind that the A19 is inside the iPhone 17, which doesn't have a vapor chamber, so it's even more impressive for it to pull these kinds of numbers. Then again, this isn't precisely an uber-scientific test, so don't take these results at face value.

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The current state of Intel's custom CPU business

Intel has been offering semi-custom Xeon processors to various customers for over a decade. These CPUs typically serve hyperscalers or large AI/data center customers who require performance or efficiency enhancements optimized for their specific workloads. These Xeon processors are tweaked from standard off‑the‑shelf Xeon SKUs with different frequency bins, power envelopes, packaging, microcode, feature sets, or even special-purpose accelerators designed for certain workloads.

When Intel discussed custom x86 processors in 2021, it mentioned customizable cores, custom IP, and customized Intel IP, which is far more impressive than its semi-custom offerings. However, the only custom products that Intel developed for a large client and disclosed publicly are the aforementioned Xeon CPUs for Amazon Web Services.

Intel has never revealed the degree of customization on the IP level with these products, though we know from AWS that its custom Xeon 6 CPU has an unknown number of cores, a 3.90 GHz all-core turbo frequency (up from 3.20 GHz for the off-the-shelf Xeon 6952P model), and faster DDR5-7200 memory support (up from DDR5-6400). However, such a level of customization is not something we usually expect from a bespoke CPU in a world where hyperscalers run dozens of highly customized models for their in-house processors inside data centers.

This is something that must change if Intel truly plans to serve a crowded market, with names like Alchip, Alphawave, AMD, Andes, Broadcom, GUC, Marvell, MediaTek, and Sondrel. This month, Intel appointed Srini Iyengar to lead its Central Engineering Group, enabling the company to build a custom silicon business serving a broad range of external customers. That job is not going to be easy, but Iyengar has the appropriate experience to do it.

Srini Iyengar has spent over two decades at Intel, with the latter half of his career focused on custom silicon architecture for infrastructure platforms. As a Principal Engineer, he has played a key role in architecting Arm-based Infrastructure Processing Unit (IPU) SoCs, defining product features to optimize performance, power, and area (PPA), and collaborating across IP vendors, verification, firmware, and manufacturing teams to deliver tailored solutions. Previously, he led the architectural development of special-purpose accelerator subsystems for server CPUs.

In addition, Intel this month disclosed its custom silicon unit's biggest win so far: a multi-year contract with Nvidia, under which it will develop and build bespoke Xeon CPUs for Nvidia's AI infrastructure. Given that Nvidia controls the lion's share of the AI hardware market, this is a significant contract both in terms of volume and in terms of Intel's public image.

Custom silicon is on the rise

When mentioning custom silicon in the context of Intel, we primarily refer to consumer and data center processors, as these are the areas where Intel excels. However, the semiconductor industry is witnessing a sharp rise in demand for bespoke application-specific processors across virtually all verticals, including AI, automotive, cloud, consumer, data centers, and consumer electronics.

Around a decade ago, only large companies could afford to develop their own custom chips, but with maturing contract chip development services, IP ecosystems, foundry yields, and a changing competitive landscape, the interest in bespoke chips is stronger than ever.

Apple's early lead in custom processors for smartphones set the tone for the consumer electronics industry, showing how proprietary silicon can deliver performance, efficiency, and product differentiation. In 2025, Google, Huawei, and Xiaomi have also developed their own smartphone SoCs.

In the data center, hyperscalers like Amazon and Google have become major drivers of custom silicon. AWS has its own Trainium accelerators for AI training, Inferentia accelerators for AI inference, and Graviton CPUs for general-purpose compute. Google produces its own chips for AI (TPUs), video (VCUs), and its own application processors for smartphones. These companies benefit from integrating hardware and software stacks, enabling better efficiency and lower costs at scale. The trend extends to other hyperscalers, including Alibaba, Baidu, Meta, Microsoft, and OpenAI.

Automotive manufacturers are also investing in their own processors (motivated by Tesla's early lead) as they shift to software-defined vehicles (SDVs). These companies are set to use multiple high-end SoCs across a vehicle, with the main Advanced Driver-Assistance System (ADAS) SoC likely using multiple chiplets. These companies are not only interested in reliability, performance, and features, but also in the long-term availability.

Advanced AI-assisted EDA tools from Cadence, Synopsys, and Siemens AI as well as simulation tools from Ansys (now part of Synopsys), greatly streamline the development of custom processors, which lowers the barrier for companies that intend to establish their own chip design division. If the return on investment looks compelling, unit costs are reduced significantly, or the total cost of ownership is lowered several times, or performance improvements are dramatic, then companies will at least consider starting an in-house chip design initiative.

However, development of chips is always a risk, both in terms of money and time-to-market. This is especially true for companies starting from scratch or lacking in-house expertise. Also, far not all companies that can benefit from custom silicon can afford an internal chip division. Finally, there are companies not willing to afford an internal chip design department for many reasons. This is where contract design-to-order service companies come into play.

What do customers want?

Companies that want the benefits of custom silicon, without the complexity of managing specifics like IP licensing, verification, or tape-out, have a very specific set of requirements for a contract chip designer, as it essentially becomes a strategic partner, not just a service provider.

One of the biggest priorities for interested companies is the experience of their partner. Customers seek design firms with a proven track record of delivering complex SoCs or ASICs, ideally in their industry domain. This includes not only silicon delivery but also successful tape-outs on advanced nodes, system-level architectural understanding, and familiarity with key verticals such as automotive, AI/ML, client PCs, and networking.

Secondly, customers expect access to a comprehensive IP portfolio. Most firms do not want to source and license every IP block individually; therefore, contract designers must provide or integrate essential IP blocks, such as PCIe, DDR, SerDes, Ethernet, USB, and security. Many customers also require the ability to integrate their own custom IP or differentiate through co-developed blocks. Therefore, the chip designer must have licensing flexibility, reuse rights, and expertise in deep IP integration.

Thirdly, clients demand a mature and automated design flow. Faster tape-outs and fewer silicon bugs are critical to stay on schedule and within budget. This also means the designer should handle validation, testbench creation, simulation, and signoff with minimal supervision.

Next, clients also value pre-existing relationships with foundries and Outsourced Semiconductor Assembly Tests (OSATs), which ensure that the designed processor will enter mass production and will ramp up to target volumes at predictable costs. Long-term support — including yield increase, silicon validation, firmware tuning, and product lifecycle management — is often a crucial factor.

Lastly, some clients prefer a full turnkey model, while others opt for joint development with an eventual handoff. Normally, a contract chip designer should support both and ensure strong IP protection, data security, and clear ownership terms.

What Intel can and cannot offer

Intel today can offer several — but not all — of the elements that customers expect from a contract chip designer. While the company is taking serious steps toward building a competitive custom silicon business, it still lags behind established ASIC players in a number of key areas.

Intel has decades of experience designing some of the world's most complex processors, including consumer CPUs for a wide range of PCs, Xeon processors for data centers, GPUs, FPGAs (via Altera), and even AI accelerators. The company clearly understands power, performance, and area (PPA) tradeoffs at scale.

For customers that require high-performance x86-based compute or custom server-class silicon, Intel's architectural know-how is likely second to none. Additionally, in recent years, Intel has gained experience in integrating chiplets made on different nodes from various foundries, a feat no one else in the industry has yet achieved in volume.

However, unlike Alchip, Andes, GUC, Marvell, or MediaTek, Intel does not have a proven track record of integrating Arm, RISC-V, or 3rd-party cores into customer designs.

Intel owns a wide range of IP, including x86 cores, GPUs (and supporting hardware like media engines, display engines, display controllers, audio codecs, etc.), AI accelerators, security engines, special-purpose accelerators (primarily for data centers), and high-speed I/O controllers and PHY (e.g., DDR, HBM, Ethernet, PCIe, Thunderbolt, UPI, USB, etc.). For customers looking to build a product around x86 and reuse trusted Intel IP blocks, the company can provide a strong starting point — particularly for data center and perhaps even for AI accelerators.

However, Intel's IP for its own 18A process technologies is relatively limited (for now), so it will have to license IPs from third parties like Synopsys, which is not a big problem, but adds complexity. While Intel has proven IPs for TSMC's process technologies, these are mostly focused on consumer solutions, not on data center solutions, which will again mean reliance on third-party IPs.

With Intel Foundry and packaging capabilities like EMIB, Foveros, and 3D chiplets, Intel can offer not only custom chip design but also manufacturing and advanced integration options. This is a strong differentiator versus design-only houses that rely on external foundries and OSATs. For chiplet-based SoCs or heterogeneous designs, Intel has a compelling packaging roadmap. Intel also has a good relationship with TSMC.

There might be a perception issue, though. Intel may favor its own IP, packaging, or node choices, which could limit design freedom. Some customers may prefer a neutral, foundry-agnostic partner that will deliver their GDSII file to TSMC.

Finally, Intel's traditional business model is focused on low-mix/high-volume chip development and production. A contract manufacturer is focused on agile development, tape-out, and low-volume production, and we have no idea how ready Intel's teams are for such work.

The first step

Intel offers world-class architectural talent, a robust infrastructure IP base, and strong manufacturing and packaging capabilities. Its custom design services are likely ideal for hyperscalers or large infrastructure clients that want high-performance x86-based silicon and are willing to produce it at Intel Foundry.

So far, Intel has had limited success landing such customers, even though it was willing (at least on paper) to offer customized cores. However, the deal with Nvidia shows that Intel can indeed land orders for highly customized CPUs, a step in the right direction.

In recent years, Intel has also built relationships with TSMC and prominent developers of chip development and simulation tools, such as Ansys (now part of Synopsys), Cadence, Synopsys, and Siemens EDA. In addition, the company partners with third-party IP companies, including Cadence and Synopsys.

However, Intel's limited experience with Arm, RISC-V, and custom processing cores is a competitive disadvantage when compared to general-purpose ASIC houses like Broadcom Custom Silicon, Alchip, or GUC. But this is arguably not a limiting factor for Intel's custom silicon business in the early stages of its development. As for how its ambitions shake out? That's something only time will be able to tell.

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This increase will occur despite the company announcing that the integrated GPU drivers for these processors will be placed on legacy software support, effectively putting them on the back burner, despite some having launched as recently as 2023. Digitimes cites industry insiders who say "lukewarm" consumer response to AI PCs as a factor.

Intel's current crop of processors hasn't performed well in the market, with CEO Lip-Bu Tan commenting frankly that the chips aren't competitive in the market. That, coupled with customers seeking value options, has led many to opt for lower-cost previous-generation models instead.

The Raptor-Lake price jump aligns with the soaring costs of DDR4 memory chips, meaning PC makers will be hard-pressed to keep their prices low by opting to use the older memory in lieu of newer, faster DDR5, thereby squeezing the budget end of the PC building market. According to the report, some brands are even experiencing supply shortages, especially as the volatility of chip pricing is making them reluctant to place long-term orders. Due to this, PC and component prices may increase slightly as we approach the end of 2025.

Windows 10’s end-of-life this coming October might result in some corporate sales, especially for companies unwilling to pay for extended support. However, this is less of a concern for consumers, meaning it’s unlikely that retail sales will increase as a result. The upcoming holiday season may drive some sales figures, especially if companies release great deals.

We've pinged Intel for comment and will update as neccesary.

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The reported talks with Apple follow a string of recent deals, including major funding from Nvidia and SoftBank, and conversion of CHIPS Act funding from the U.S. government to equity. These moves are believed to be a part of the company's revival strategy that not only includes securing money, but also securing commitments to use the company's products and services going forward to justify developing Intel's next-generation 14A process technology and building production capacities that will support the node.

Apple used Intel's CPUs inside its PCs from 2005 to 2020, but it never used the company's low-power processors for its iPhones or iPads. Instead, it switched its Macs to Arm-based SoCs in 2020. Apple's current computers do not use any hardware from Intel, even though these systems use technologies originally developed by Intel or co-developed with Intel, including DisplayPort, NVMe, PCIe, Thunderbolt, and USB. Even Thunderbolt 5 controllers/retimers found in the latest MacBook Pro come from Apple, yet are certified by Intel. It is unknown how Apple and Intel could collaborate going forward, though the high-tech world is very convoluted.

Intel's timing to enter negotiations with Apple seems favourable as the high-tech giant has just received investments from Nvidia, SoftBank, and the U.S. government. Such high-profile backers reflect a growing belief in Intel's comeback, so it should be easier for the company to persuade Apple and other potential investors to buy Intel stock. Also, Apple has prioritized expanding its investments within the U.S., even though much of its supply chain remains abroad. In August, it pledged $600 billion toward domestic initiatives, an increase from a previous $500 billion commitment.

Obviously, a deal with Apple would further underscore confidence in Intel's direction, which would carry symbolic weight and bolster Intel's public image. However, if the rumored deal does not yield any agreement, this might harm Intel's position.

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The Elite Extreme is a new tier above the standard Elite, which was the top chip in the original X-series line. The Snapdragon X2 Elite Extreme will offer up to 18 cores, and Qualcomm claims it's the first Arm chip to hit 5 GHz (on up to two cores).

The company says its Elite chips will be made on a 3-nanometer process node. The Snapdragon X2 Elite uses a mix of Qualcomm Oryon Prime cores and what it calls Performance CPU cores. This is seemingly a standard Performance/Efficiency layout with different names. At normalized power, Qualcomm says it offers up to 75% more performance than its competitors. In multitasking, it claims the new chips will offer up to 31% faster performance at a normalized ISO power, while needing 43% less power than last-gen chips. We don't yet have benchmarks to share, and Qualcomm didn't note the exact TDPs for these chips.

The Elite Extreme has higher clock speeds in both single- and dual-core boost and multi-core max than the other two Snapdragon X2 Elite variants. The Snapdragon X2 Elite Extreme is model X2E-96-100, while the standard Elites are X2E-88-100 and X2E-80-100. The Extreme and the 88-100 each have 18 cores, while the 80-100 has 12 cores.

There's also a new Qualcomm Adreno GPU, which the company says brings a 2.3x increase in performance per watt and power efficiency compared to the last generation. The new 80 TOPS NPU looks to be the fastest in a laptop (with INT8 math), with 78% more TOPS than the previous generation, 45 TOPS NPU. In its press release, Qualcomm writes that this NPU "is designed to handle Copilot+ and concurrent AI experiences." (Copilot+ doesn't include actual Copilot, the assistant that runs largely in the cloud.)

The X2 Elite chip supports Qualcomm's x75 5G modem-RG system, with up to 10 Gbps peak downloads. It also works with Qualcomm FastConnect 7800 for Wi-FI 7/6/6E and Bluetooth 5.4 LE. Qualcomm's new Guardian is an out-of-band management feature for business-focused remote oversight, akin to Intel’s vPro.

Qualcomm says that it expects systems with the X2 Elite to ship in the first half of 2026. That may mean we’ll see a device or two at CES 2026 in Las Vegas, before launch. Notably, Qualcomm's images and a sizzle reel both suggest that the X2 Elite will appear in both laptops and mini PCs.

It's been over a year since the initial batch of Snapdragon X Elite chips were announced. Subsequently, a full lineup including the X Plus (in both 10-core and 8-core variants) and a standard Snapdragon X chip were released. The top-end chips appeared in designs from major manufacturers, including Microsoft, Samsung, Dell, HP, Asus, Lenovo, and Acer.

The initial chips showed off their efficiency through long battery life, and we hope to see the X2 SoCs build on that. They didn't, however, work with some applications (namely games) and we want to see better emulation support there. Windows on Arm, however, didn't exactly take over the market, so we'll see what the new chips bring to the table.

Qualcomm is announcing these chips pretty early. The Snapdragon Summit comes ahead of Apple's next major release (Apple is Qualcomm's biggest rival in Arm-based systems), which is rumored to be early next year. And of course, by the time many X2 devices make it to market in the first half of 2026, AMD and Intel may also have next-gen x86 chips ready to compete.

Next year is shaping up to be an eventful one for those looking to buy a new laptop, which should be good for consumers and the industry as a whole. After a fairly quiet 2025 on the mobile front, it’ll also be nice to have some fresh silicon to test.

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The quad-core processor with simultaneous multithreading (SMT) originates from AMD's long-gone Zen 3 days, specifically from the Ryzen 5000G series (codenamed Cezanne). Typically, these Cezanne series chips are equipped with Vega graphics; however, the Ryzen 3 5100, along with the Ryzen 7 5700 and Ryzen 5 5500, belongs to a distinctive subset that does not include integrated graphics. This absence is evidenced by the processor model names, which lack the "G" suffix.

As depicted in the photograph, the Ryzen 3 5100 possesses an Ordering Part Number (OPN) code of 100-00000456, which appears somewhat fictitious as it is not readily available in any known sources. AMD does not list the Ryzen 3 5100 on its official website, although occasional references to OEM components can sometimes be found there. The copyright year associated with the Ryzen 3 5100 is 2020, suggesting that the initial production of the chip commenced in that year. This timeframe is consistent with the Cezanne series.

Confusion frequently arises regarding the Ryzen 5000G series and the primary Ryzen 5000 (codenamed Vermeer) series, due to AMD's similar branding for both series. Certain SKUs within the Vermeer lineup, such as the Ryzen 5 5600 or Ryzen 7 5800, lack a suffix, which may lead to misunderstandings, such as perceiving the Ryzen 3 5100 as a Vermeer processor. Although Cezanne and Vermeer share similarities, including the use of Zen 3 execution cores and the AM4 socket, they are inherently different. Cezanne employs a monolithic design, whereas Vermeer utilizes AMD's chiplet architecture.

According to listings from motherboard manufacturers, the Ryzen 3 5100 is confirmed to feature the monolithic Cezanne die. The Ryzen 3 5100 serves as the direct successor to the previous Ryzen 3 4100 (codenamed Renoir). The enhancements encompass a transition to the Zen 3 core architecture, an increase of 200 MHz in boost clock speed, and a doubling of the L3 cache size. Alternatively, from another perspective, the Ryzen 3 5100 can be regarded as an underclocked variant of the Ryzen 3 5300G, distinguished by a 200 MHz lower base clock and the absence of integrated graphics.

The Ryzen 3 5100 is an OEM processor, which largely explains why it took so long for it to smile for the camera. However, make no mistake, the Zen 3-powered chip has likely been available for purchase in China for some time now. With sufficient knowledge of where to search, one can almost invariably locate various items in China, including unreleased hardware, engineering samples of upcoming processors, or OEM components.

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The Athlon 3000G is one of the slowest CPUs you can install in an AM4 motherboard. The CPU was released in 2019 as AMD's entry-level processor, succeeding the Athlon 200GE series that preceded it. The chip has two unlocked Zen CPU cores, four threads, just 4MB of L3 cache, a 35W TDP, and a 3.5 GHz clock speed. For graphics, the 3000G comes with a Vega 3-based iGPU featuring three CUs, 192 cores, and a 1.1GHz clock speed.

AMD launched a second variant of the chip in 2023, featuring a beefier Wraith cooler, new packaging, and a newer die based on the Dali architecture. Dali was an offshoot of Raven Ridge that was cheaper to manufacture, but based on the same 14nm process. As a result, performance is identical between the original and refreshed versions. One interesting tidbit about the Dali die is that it only features two physical cores; by contrast, the original Raven Ridge version of the 3000G had a quad-core die with two disabled cores.

The latest re-release is unsurprisingly based on the newer Dali version of the Athlon 3000G. The aforementioned part number (YD3000C6FHSBX) confirms this. Models with the letters "FH" included signify that they are the newer models; by contrast, part numbers including "FB" represent the original models.

It may seem silly for AMD to release an entry-level CPU that is now six years old, running on an architecture introduced eight years ago. But AMD would not release a CPU like this unless it knew there was still a market for it. The Ryzen 5 5500X3D is an excellent example of this being an "all-new" Ryzen CPU based on the Zen 3 architecture, but it is region-locked to Latin America. The Ryzen 5 5600F and Ryzen 5 7400 are similar, both being locked to the Asian market.

Intel is also no stranger to this strategy; it recently released the Core i5-110, based on its Comet Lake 14nm architecture, an architecture that debuted five years ago in chips such as the Core i9-10900K.

The only caveat owners will need to be aware of is motherboard compatibility for the 3000G. The chip is so old that AMD's latest iteration of 500-series AM5 motherboards doesn't support it. Technically, these boards can help, but AMD has released so many AM4 CPUs over the past eight years that there likely isn't enough room in the firmware memory of 500-series motherboards to accommodate such old chips.

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For some context, Nvidia has never officially unveiled the N1/N1X SoCs, but speculation sparked from CES 2025's announcement of Project DIGITS, where the company revealed its collaboration with MediaTek. From that came the GB10 "Superchip," which is part of the company's DGX Spark lineup, and multiple vendors have already released their iterations of it. The GB10 is aimed squarely at AI workloads, offering supercomputer-like performance at home. It includes a 20-core ARM-based CPU developed in conjunction with MediaTek, along with a powerful Blackwell-based GPU chiplet.

The N1 SoC shares the same specs, at least according to previous leaks and rumors, featuring 6,144 CUDA cores for its GPU - same as the desktop RTX 5070 - and a 20-core CPU split across two clusters, built using Nvidia's Grace architecture. Back in July, we saw a Geekbench score surface for the N1X, which allegedly confirmed these specs, giving credence to the fact that GB10 and N1 are intrinsically tied. Of course, just because two products are closely linked to each other doesn't mean they're the same, but all signs pointed toward identical chips being used across the board.

That notion has just been legitimized by Jensen Huang, who said the following in a webcast last night, "We also have a new ARM product that's called N1. And that product is - that processor is going to go into the DGX Spark and many other versions of products like that. And so we're super excited about the ARM road map, and this doesn't affect any of that."

According to Nvidia's CEO, the silicon powering the GB10 — which itself is what powers DGX Spark — is identical to the N1/N1X SoC. Especially the part about "many other versions" confirms that N1 could simply be a slightly lower-binned version of the full-fat GB10. After all, the latter is meant for client devices like laptops and desktops, whereas the GB10 targets professionals. The distinction matters because N1 represents Nvidia's first serious attempt at taking their in-house CPU cores mainstream (following Tegra).

Unfortunately, that's the only statement pertaining to N1, so we still don't know when it will actually launch. But at least it's out there now that GB10, which should already be in the hands of some, is what Nvidia will eventually release in the future, just with a different target audience in mind. Given Nvidia's new deal with Intel, the interest in developing ARM-based products might collide with x86-based solutions that Intel specializes in. However, that's apparently not an issue, and both roadmaps will continue forward at full force, unaffected by each other.

The N1 SoC has already been tested on Windows, which suggests that the chip is getting closer to its Windows-on-ARM destination day by day. The GB10, on the other hand, is not exactly intended for Microsoft's operating system; rather, it is a Linux-based DGX OS that's optimized for local AI, datacenter, and other professional workloads. With that said, since the N1 technically doesn't even exist yet, there is no confirmation for it eventually running on Windows (despite the obvious implication), and Jensen Huang did not comment on it either.

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Trump not involved

"The Trump administration had had no involvement in this partnership at all," said Nvidia's Huang said, during the joint press conference with Nvidia on Thursday. "They would have been very supportive, of course. Today I had the opportunity to tell Secretary [of Commerce Howard] Lutnick and he was very excited and very supportive of seeing two American technology companies working together."

The work began around a year ago, and preliminary agreements were reached by Intel's then-CEO Pat Gelsinger and Nvidia's Jensen Huang even before that. (A year ago, Joe Biden was president, though no one suggested his administration was involved, either.) Intel and Nvidia are working on custom data center CPUs that Nvidia will integrate into its AI platforms as well as GPU tiles that Intel will integrate into its upcoming client processors. In both cases CPUs and GPUs will use Nvidia's NVLink technology as an I/O interface. By now, there are three teams working together on the joint projects.

The work is ongoing

 "The two technology teams have been discussing and architecting solutions now for probably coming out to a year," said Jensen Huang, chief executive of Nvidia. "The two architecture teams… Well, it is three architecture teams are working across... the CPU architecture, as well as product lines for server and PCs. The architecture work is fairly extensive, and the teams are really excited about the new architecture. The teams have been working for a while and we are excited about the announcement today."

As Huang mentioned teams working on a CPU architecture as well as client and data center product lines, we figure out that Nvidia wants rather deep customizations of Intel's Xeons to meet the needs of its AI platforms.

The involvement of a CPU architecture team highlights the depth of the partnership between Intel and Nvidia as well as indicates that the CPU company is implementing rather deep optimizations required by next-generation AI platforms. Given Nvidia's history with Grace and Vera CPUs (custom Arm) and the high bandwidth needs of its next-gen GPUs (e.g. Rubin, Feynman, post-Feynman, etc.), it is reasonable to expect tailored cache structures, memory IO, and coherency protocols on these x86 CPUs.

Such a deep collaboration probably means that custom Intel processors will be used by Nvidia sometimes in the post-Vera Rubin platform era. We would certainly expect Nvidia's data center GPU team to work with Intel as well, but Huang never mentioned one during the call, probably because Feynman GPUs have already been defined by now.

Yet, he mentioned that there are two more teams working on product lines for server and PC products, which probably points to data center system level architecture team on Nvidia's side as well as client CPU/system level architecture team on Intel's side.

While the collaboration between Intel and Nvidia on the data center front is a multi-faceted cross-organizational effort, the timing to its fruition is tied to emergence of Intel's custom CPUs for Nvidia.

As for the joint work on client project (or projects), developing an Intel CPU with Nvidia GPU chiplet will take at least three to four years from drawing board to volume production. The collaboration requires deep integration across SoC fabrics, dimensions, performance/power consumption targets, packaging technologies (Foveros, EMIB), and software stacks from both companies. The collaboration likely began in 2024, so the first products could hit the market in late 2027 or early 2028.

Hundreds of millions of PCs

While we do not know for sure when Intel and Nvidia plan to come up with jointly developed products, it looks like they intend to address a broad range of applications. At least, Jensen Huang said that that the two companies plan to build CPUs that could address the vast majority of notebooks, which points to hundreds of millions of devices.

"Just the notebook market is 150 million notebooks sold each year," said Huang. "So that kind of gives you a sense of the scale of the work that we are going to do here. We are going to address the consumer market, we are going to address a vast majority of that consumer PC market, consumer PC notebook market."

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On this trip, the first day after a weekly restock, when everything in the bins costs $10, I managed to find a roll of Creality 3D printer PLA filament. That's not a huge discount over its typical Amazon sale price, but I happened to need a new spool for my Anycubic printer, and I was a few blocks from home, so this saved me the hassle of ordering. After a few more minutes pawing through returns, I hadn't found anything else and went up to pay. But there was a line, and I wound up waiting at the corner of one of the closest bins to the register. Killing time, I idly dug around while I waited, and soon spotted the familiar blue of an Intel CPU box. I flipped it over and saw an i7-14700 sticker!

Could I really have just found the frequency-locked version of Intel's last-generation flagship for $10? And if so, had someone returned it because of the notorious instability issues? Something else? I could see the CPU in its plastic clamshell through the cardboard window. The back looked OK, but the top was covered in thermal paste.

I was suspicious, but by this time, I was next in line, curious, and decided to gamble $10 on Intel. That’s maybe not the smartest wager I could make in 2025, but I was curious, and figured this would at least be more interesting than wasting money on a scratch-off ticket. I checked out with three items: the filament, the CPU, and another pair of shoe insoles – seriously, I wear those things out and can never have enough.

After paying my $32.25 after tax, I stepped outside, wishing I had a napkin to immediately wipe the thermal paste off with. Instead, I slacked my coworkers about what I had found, while I marched back to my apartment. When I got home, I immediately opened the CPU box, grabbed a paper towel, and wiped the used thermal paste off the CPU's IHS, to be met with immediate disappointment. This wasn't a 14th Gen Core i7 after all!

But it was a 13th Gen Core i5 – a Core i5 13500, to be specific. Not quite one of the best CPUs, and a generation older than what the box promised, but still a very usable chip, with 14 cores, 20 threads, and a Turbo Frequency of 4.8 GHz. It's not the fastest chip, but it currently sells for $264 at Newegg – not a bad pickup for $10. If it works, anyway.

So why was a 13th Gen Core i5 returned in a Core i7-14700 box? For those who haven't already connected the dots, it's likely that someone scammed Amazon by buying a new, higher-end chip than what they had, put the old one back in the box (helpfully obscured by thermal paste), and returned it for a refund. And Amazon, dealing as it does with millions of packages a day, seemingly accepted the return without checking that the returned product was actually what was returned, eventually selling it as part of a lot of liquidated returns.

I have no way to verify any of this, of course, but it seems the most likely scenario. And it's certainly unsurprising that Amazon would just accept a return without paying someone to open the box, wipe off the thermal paste, and confirm they had received the Core i7-14700 the customer had ordered. There's no way Amazon could continue to run its business if it had to do something like that with even half of its returns.

The only lingering question I had was whether my $10 13th Gen Core i5 CPU actually works. So I grabbed my trusty Hoto screwdriver, removed the AIO waterblock on the system that previously served as our external SSD storage testbed, and removed the 12th Gen Core i5 CPU that previously resided in the LGA 1700 socket. I then dropped my 13th Gen Core i5 into the motherboard, applied five small drops of thermal paste, re-attached the cooler, and plugged the system back in.

I pressed the power button and stared at the blackness of my test bench monitor for what felt like too many seconds, but eventually I saw the spinning circle and soon the familiar Windows 11 login screen. The old system booted up without an issue, and after running a few benchmarks, it looks like my $10 chip performs as expected.

Now the only question is, what should I do with it? I don't need another gaming rig – I'm writing this on an AMD Ryzen 7950X / Nvidia RTX 4090 PC I built back in 2023, and I already have a few other systems and CPUs for testing PC cases and accessories. Maybe I'll build a system for a family member or friend.

All I know is, while it didn't turn out to be a 14th Gen Core i7 promised on the box, I'm happy with the results of my $10 CPU gamble, and I wonder what I'll find at the returns store next week. I don't really need any more PC hardware, but if I could pass up enticing tech that I don't really need, I probably wouldn't have gotten into this crazy business in the first place.

If that figure is reflective of shipping products, that would be quite the leap for Qualcomm's chips. The company's SoCs have historically trailed Apple's designs by some margin in both performance and efficiency, so catching up would be quite the feat. The A19 Pro rings in at close to 3,900 points in Geekbench. To put this into perspective, even the mighty Ryzen 7 9800X3D and Ryzen 9 9950X3D post scores of about 3,400 and 3,500, respectively. That's by no means an ultimate measure of real-world performance, but it does display the might of contemporary Arm-based chips, at least in power-constrained scenarios.

The 3,831-point figure for the Snapdragon 8 Elite Gen 5 might sound a little too good to be true — particularly as it would mean a generational uplift of over 34% — but it is at least consistent with leaks that showed a purported Samsung handset displaying a score of nearly 3,400 at only a 4 GHz boost clock speed. Per Qualcomm's recent announcement, the chip uses two performance cores and six efficiency cores, with the performance cores hitting 4.61 GHz in the standard configuration, or 4.74 GHz in a Samsung Galaxy-specific flavor. This makes 3,831 points at least plausible, as the recent score post shows 4.6 GHz for the performance cores. The new SoC is manufactured in TSMC's 3-nm N3P node, an evolution of the previous N3E.

That's not the only noteworthy difference, though. Longhorn points out in their X post that "SVE2 and SME say hello", implying that the new chip ought to support the newer versions of Arm's Scalable Vector Instructions and Scalable Matrix Instructions. Both of these CPU instruction sets are called "SIMD" (Single Instruction Multiple Operation), making it easy for developers to efficiently process chunks of data at a time with few instructions.

That means that applications that can make use of those instructions should see quite a significant speed boost. The original SVE was designed for AI-related data processing, but Arm says that SVE2 should cover more broad uses cases, and calls out general-purpose software, multimedia, computer vision, and in-memory databases. Geekbench does use SME (which in turn apparently needs a subset of SVE2), so the posted scores should reflect the use of these optimizations.

By the way, if the "Gen 5" name in this report is throwing you off, know that you're not alone. Many people thought the new Snapdragon 8 Elite SoC would be called "Gen 2", but Qualcomm has decided that the "Gen" suffix now applies to its series of Snapdragon products, making this chip the fifth generation, across Snapdragon 8 Gen 1, Gen 2, Gen 3, with the original Snapdragon 8 Elite counting as "Gen 4".

Of course, consider that these recently-posted figures originate from leakers around the globe and may not reflect production silicon, clock-speed targets, or power envelopes of their final devices. Second, although Geekbench single-core results mostly track with general application performance, that may not be true of every scenario. Regardless, even if figures for production Snapdragon 8 Elite Gen 5 devices are somewhat lower, that would still be an impressive showing.

The products include x86 Intel CPUs tightly fused with an Nvidia RTX graphics chiplet for the consumer gaming PC market, named the ‘Intel x86 RTX SOCs.’ Nvidia will also have Intel build custom x86 data center CPUs for its AI products for hyperscale and enterprise customers. Additionally, Nvidia will buy $5 billion in Intel common stock at $23.28 per share, representing a roughly 5% ownership stake in Intel. (Intel stock is now up 33% in premarket trading.)

The partnership between the two companies is in the very early stages, Nvidia told us, so the timeline for product releases, along with any product specifications, will be disclosed at a later, unspecified date. (Given the traditionally long lead-times for new processors, it is rational to expect these products will take at least a year, and likely longer, to come to market.)

Nvidia emphasized that the companies are committed to multi-generation roadmaps for the co-developed products, which represents a strong investment in the x86 ecosystem. But Nvidia representatives tell us it also remains fully committed to other announced product roadmaps and architectures, including the company's Arm-based GB10 Grace Blackwell processors for workstations and the Nvidia Grace CPUs for data centers, as well as the next-gen Vera CPUs. Nvidia says it also remains committed to products on its internal roadmaps that haven’t been publicly disclosed yet, indicating that the new roadmap with Intel will merely be additive to existing initiatives.

Nvidia hasn’t disclosed whether it will use Intel Foundry to produce any of these products yet. However, while Intel has used TSMC to manufacture some of its own recent products, its goal is to bring production of most high-performance products back into its own foundries.

Some products never left. For instance, Intel’s existing Granite Rapids data center processors use the ‘Intel 3’ node, and the upcoming Clearwater Forest Xeons will use Intel’s own 18A process node for compute. This suggests that at least some of the Nvidia-custom x86 silicon, particularly for the data center, could be fabbed on Intel nodes. Intel also uses TSMC to fabricate many of its client x86 processors, however, so we won’t know for sure until official announcements are made — particularly for the RTX GPU chiplet.

In either case, Nvidia has been mulling using Intel Foundry since 2022, has fabbed test chips there, and participates in the U.S. Defense Dept.'s RAMP-C project with Intel. The DoD project involves Nvidia already making chips on Intel's 18A process node, so it wouldn't be a total surprise.

While the two companies have engaged in heated competition in some market segments, Intel and Nvidia have partnered for decades, ensuring interoperability between their hardware and software for products spanning both the client and data center markets. The PCIe interface has long been used to connect Intel CPUs and Nvidia GPUs. The new partnership will find tighter integration using the NVLink interface for CPU-to-GPU communication, which affords up to 14 times more bandwidth along with lower latency than PCIe, thus granting the new x86 products access to the highest performance possible when paired with GPUs. That's a strategic advantage. Let’s dive into the details we’ve learned so far.

Intel x86 RTX SOCs for the PC gaming market

For the PC market, the Intel x86 RTX SoC chips will come with an x86 CPU chiplet tightly connected with an Nvidia RTX GPU chiplet via the NVLink interface. This type of processor will have both CPU and GPU units merged into one compact chip package that externally looks much like a standard CPU, rivaling AMD’s competing APU products.

Intel's new x86 RTX CPUs will compete directly with AMD's APUs. For AMD, that means it faces intensifying competition from a company with the leading market share in notebook CPUs (Intel ships ~79% of laptop chips worldwide) that's now armed with GPU tech from Nvidia, which ships 92% of the world's gaming GPUs.

This type of tight integration packs all the gaming prowess into one package without an external discrete GPU, providing power and footprint advantages. As such, we're told these chips will be heavily focused on thin-and-light gaming laptops and small form-factor PCs, much like today’s APUs from AMD. However, it’s possible the new Nvidia/Intel chips could come in multiple flavors and permeate further into the Intel stack over time.

Intel has worked on a similar type of chip before with AMD; there is at least one significant technical difference between these initiatives, however. Intel launched its Kaby Lake-G chip in 2017 with an Intel processor fused into the same package as an AMD Radeon GPU chiplet, much the same as the description of the new Nvidia/Intel chips. You can see an image of the Intel/AMD chip below.

This SoC had a CPU at one end connected via a PCIe connection to the separate AMD GPU chiplet, which is flanked by a small, dedicated memory package. This separate memory package was only usable by the GPU. The Nvidia/Intel products will have an RTX GPU chiplet connected to the CPU chiplet via the faster and more efficient NVLink interface, and we’re told it will have uniform memory access (UMA), meaning both the CPU and GPU will be able to access the same pool of memory. Given the particulars of Nvidia's NVLink Fusion architecture, we can expect the chips to communicate via a refined interface, but it is unlikely that it will leverage Nvidia's C2C (Chip-to-Chip) technology, an inter-die/inter-chip interconnect that's based on Arm protocols that aren't likely optimized for x86.

Intel notoriously axed the Kaby Lake-G products in 2019, and the existing systems were left without proper driver support for quite some time, in part because Intel was responsible for validating the drivers, and then finger-pointing ensued. We’re told that both Intel and Nvidia will be responsible for their respective drivers for the new models, with Nvidia naturally providing its own GPU drivers. However, Intel will build and sell the consumer processors.

We haven’t spoken with Intel yet, but the limited scope of this project means that Intel’s proprietary Xe graphics architecture will most assuredly live on as the primary integrated GPU (iGPU) for its mass-market products.

Nvidia's first x86 data center CPUs

Intel will fabricate custom x86 data center CPUs for Nvidia, which Nvidia will then sell as its own products to enterprise and data center customers. However, the entirety and extent of the modifications are currently unknown. We know that Nvidia will employ its NVLink interface, which suggests that the chips could leverage Nvidia’s new NVLink Fusion technology for custom CPUs and accelerators, enabling faster and more efficient communication with Nvidia’s GPUs than is possible with the PCIe interface.

Intel has long offered custom Xeons to its customers, primarily hyperscalers, often with relatively minor tweaks to clock rates, cache capacities, and other specifications. In fact, these mostly slightly-modified custom Xeon models once comprised more than 50% of Intel’s Xeon shipments. Intel has endured several years of market share erosion due to AMD’s advances, most acutely in the hyperscale market. Therefore, it is unclear if the 50% number still holds true, as hyperscalers were the primary customers for custom models.

Intel has said that it will design completely custom x86 chips for customers as part of its IDM 2.0 strategy. However, aside from a recent announcement of custom AWS chips that sound like the slightly modified Xeons mentioned above, we haven’t heard of any large-scale uptake for significantly modified custom x86 processors. Intel announced a new custom chip design unit just two weeks ago, so it will be interesting to learn the extent of the customization for Nvidia’s x86 data center CPUs.

Nvidia already uses Intel’s Xeons in several of its systems, like the Nvidia DGX B300, but these systems still use the PCIe interface to communicate with the CPU. Intel’s new collaboration with Nvidia will obviously open up new opportunities, given the tighter integration with NVLink and all the advantages it brings with it.

The likelihood of AMD adopting NVLink Fusion is somewhere around zero, as the company is heavily invested in its own Infinity Fabric (XGMI) and Ultra Accelerator Link (UALink) initiatives, which aim to provide an open-standard interconnect to rival NVLink and democratize rack-scale interconnect technologies. Intel is also a member of UALink, which uses AMD’s Infinity Fabric protocol as the foundation.

Dollar and Cents, Geopolitics

Nvidia’s $5 billion purchase of Intel common stock will come at $23.28 a share, roughly 6% below the current market value, but several aspects of this investment remain unclear. Nvidia hasn’t stated whether it will have a seat on the board (which is unlikely) or how it will vote on matters requiring shareholder approval. It is also unclear if Intel will issue new stock (primary issuance) for Nvidia to purchase, as it did when the U.S. government recently became an Intel shareholder (that is likely). Naturally, the investment is subject to approval from regulators.

Nvidia’s buy-in comes on the heels of the U.S government buying $10 billion of newly-created Intel stock, granting the country a 9.9% ownership stake at $20.47 per share. The U.S. government won’t have a seat on the board and agreed to vote with Intel’s board on matters requiring shareholder approval “with limited exceptions.” Softbank has also recently purchased $2 billion worth of primary issuance of Intel stock at $23 per share.

The U.S. government says it invested in Intel with the goal of bolstering US technology, manufacturing, and national security, and the investments from the private sector also help solidify the struggling Intel. Altogether, these investments represent a significant cash influx for Intel as it attempts to maintain the heavy cap-ex investments required to compete with TSMC, all while struggling with a negative amount of free cash flow.

“AI is powering a new industrial revolution and reinventing every layer of the computing stack — from silicon to systems to software. At the heart of this reinvention is Nvidia’s CUDA architecture,” said Nvidia CEO Jensen Huang. “This historic collaboration tightly couples NVIDIA’s AI and accelerated computing stack with Intel’s CPUs and the vast x86 ecosystem—a fusion of two world-class platforms. Together, we will expand our ecosystems and lay the foundation for the next era of computing.”

“Intel’s x86 architecture has been foundational to modern computing for decades – and we are innovating across our portfolio to enable the workloads of the future,” said Intel CEO Lip-Bu Tan. “Intel’s leading data center and client computing platforms, combined with our process technology, manufacturing and advanced packaging capabilities, will complement Nvidia's AI and accelerated computing leadership to enable new breakthroughs for the industry. We appreciate the confidence Jensen and the Nvidia team have placed in us with their investment and look forward to the work ahead as we innovate for customers and grow our business.”

We’ll learn more details of the new partnership later today when Nvidia CEO Jensen Huang and Intel CEO Lip-Bu Tan hold a webcast press conference at 10 am PT. {EDIT: you can read our futher coverage of that press event here.}

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First up, we have the Ryzen 5 Pro 9645. It comes with 6 cores and 12 threads, clocked at 3.9 GHz with boost speeds up to 5.4 GHz. Then there's the Ryzen 7 Pro 9745 with 8 cores and 16 threads, featuring the same 5.4 GHz boost clock but a slightly reduced 3.8 GHz base clock. The final model is the Ryzen 9 Pro 9945, which only has 12 cores and 24 threads, clocked at 3.4 GHz and boosting up to 5.4 GHz. Cache levels also remain unaltered in comparison to analogous Ryzen 9000 models.

All three SKUs share the same 65W TDP, despite the standard Ryzen 9 9900X — which the Pro 9945 would be based on — featuring a 120W TDP. But it makes sense given there are 4 fewer cores on the Pro 9945. There are consistent base and boost clock gains over the previous generation Ryzen PRO 7000 series, like a 300 MHz boost clock increase on the Ryzen 5 Pro SKUs. However, the Ryzen Pro 9945 loses 300 MHz in its base clock when compared to its predecessor (3.4 GHz vs 3.7 GHz).

Performance-wise, AMD shared some slides highlighting the improvements these Zen 5-based enterprise processors carry. Even though they're technically not focused on raw numbers, the Ryzen 9 Pro 9945 is reportedly up to 44% faster in Blender and up to 22% faster in other productivity benchmarks, when compared to Intel's Core i7-14700 processor. Moreover, surprisingly, these CPUs will also come with a bundled Wraith Stealth stock cooler

Pricing and availability are not clear because these CPUs are distributed to OEMs that supply them in bulk to enterprises around the world. Ryzen PRO is generally less mature than Intel's competing vPro technology, but both offer similar features with an overlapping goal in mind.

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The Ryzen 7 9700F and Ryzen 5 9500F are new chiplet-style Zen 5 processors that lack integrated graphics. The 9700F is an eight-core chip featuring 32MB of L3 cache, 65W TDP, 3.8GHz base clock, and 5.5GHz peak boost clock. The 9500F features six Zen 5 CPU cores, 32MB of L3 cache, 65W TDP, a base clock of 3.8 GHz, and a peak boost clock of 5.2 GHz.

The two chips are essentially F-series versions of the Ryzen 7 9700X and Ryzen 5 9600/9600X that lack integrated graphics. This is especially the case with the 9700F, as it shares the same specs as the 9700X from the cores and cache, all the way down to the base and boost clocks as well. The Ryzen 5 9500F is also very similar to the Ryzen 5 9600/9600X, but both have higher clock speeds, with the 9600 boasting a 200MHz higher clock speed than the 9500F.

The Ryzen 5 7400 is a new entry-level Zen-4 CPU featuring six cores, 16 MB of L3 cache, 65W TDP, a base clock of 3.3GHz, and a maximum boost clock of 4.3GHz. This CPU is arguably one of the most unorthodox chips to come out from AMD, being one of the very first chips to come out after its F-series counterpart (the Ryzen 5 7400F has been on the market for several months).

What's even stranger is the CPU's L3 cache configuration of just 16MB. Traditionally, the 16MB cache limit is targeted at AMD's monolithic APUs, which physically don't hold more than 16 MB of L3 cache. However, the Ryzen 5 7400 is classified with the Raphael codename, meaning it takes advantage of AMD's chiplet-style design, which incorporates 32MB of L3 cache. Apparently, AMD has opted to disable half the L3 cache on this chip, probably as a method of reducing waste on potentially defective Zen 4 dies with defective L3 cache.

This strange configuration also makes the Ryzen 5 7400 a significantly different processor than its twin-by-name-alone, the Ryzen 5 7400F. While the 7400F lacks integrated graphics, it is a noticeably better processor, boasting a 400MHz higher base clock and boost clock, and 32MB of L3 cache. It could be argued that the Ryzen 5 7400 has more in common with the Ryzen 5 8500G, which has just 16MB of L3 cache, integrated graphics, and six cores, though those cores consist of Zen 4 and Zen 4c cores.

The Ryzen 5 5600F is yet another Zen 3 part coming to the market. As the name states, the 5600F is another variant of the 5600/5600X featuring six Zen 3 cores, 32MB of L3 cache, 65W TDP, a 3.5GHz base clock, and a 4.4GHz peak boost clock. This chip is also somewhat unorthodox, sporting the F-series nomenclature. Chips with this nomenclature usually have disabled integrated graphics, but the Ryzen 5000 series does not support integrated graphics at all.

Apparently, the "F" in this case denotes reduced performance compared to its vanilla counterpart. The Ryzen 5 5600 features a 500MHz higher base clock and 400MHz higher boost clock than the 5600F.

The new Zen 3 chips are not the only recent re-use of old silicon. Intel has also re-released its 10th Gen Core "Comet Lake" silicon as the Core i5-110 in its Ultra Series 1 line.

These CPUs, specifically the 7400 and 5600F, continue to demonstrate AMD's commitment to providing as many solutions as possible. The main reason most of the more unorthodox chips exist is for global markets, particularly Asia or Latin America (like the Ryzen 5 5500X3D). The Ryzen 5 7400F is regionally exclusive to China and other Asian markets, the Ryzen 5 5600F is locked to the Asia-Pacific / Japan region, and the Ryzen 7 9700F is locked to North America. The Ryzen 5 9500F is the only chip of the bunch that boasts regional availability.

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The reviewer tested the Core Ultra 3 205 by pairing it with a budget H810 motherboard along with 32GB of DDR5 memory. By the looks of it, the processor is capable of delivering good performance for everyday computing and can handle multiple browser tabs, as well as 8K YouTube videos at low CPU usage. In terms of power draw, the chip can draw up to 65W, and it is recommended to use a third-party CPU cooler instead of the stock Intel heatsink for better thermal performance.

The reviewer also ran synthetic benchmark tests to quantify the performance of the CPU, where it scored 13,394 points in Cinebench R23’s multi-core test, a 48% jump over the Core i3-14100. In terms of single-core performance, the Core Ultra 3 205 achieved 1,983 points, outperforming both the Core i3-14100 and the Core i5-14400.

Furthermore, the iGPU solution on the Core Ultra 3 205 is significantly superior to what’s offered on previous-gen Raptor Lake Refresh chips. As a result, it not only surpasses the Core i3-14100 and Core i5-14400 in 3DMark Time Spy, but also delivers performance comparable to the Core Ultra 5 225, since both feature the same 2 Xe-cores. While the integrated GPU is not powerful enough to run demanding game titles, it can handle less resource-intensive games such as DOTA and Valorant.

Considering the performance, the Core Ultra 3 205 is shaping up to be a solid entry-level option, especially for budget gaming builds. As always, pricing is going to play a big role in its appeal, with Bulls Lab suggesting the CPU is listed at 199,000 Won (approx $140), which is in line with previous reports that suggested a $150 price tag. The reviewer also points to a pre-built PC with the Core Ultra 3 205, 8GB RAM, and a 500GB SSD listed at 499,000 Won, which is roughly around $360.

Intel is yet to officially list the processor on its retail channels, and early sightings have mostly been limited to overseas markets like South Korea. Based on earlier reports, the chip may end up primarily in pre-built systems or with OEM and system-integrators rather than being offered as a standalone boxed CPU. This would make it difficult for DIY PC builders to get their hands on one.

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Originally spotted by @realVictor_M, AMD calls this its "1000 FPS Club" in a promotional slide translated from Chinese to English. Its members are the Ryzen 7 9800X3D, Ryzen 9 9950X3D, and the mobile Ryzen 9 9955HX3D. Notably, the 9900X3D is missing from this list — perhaps because it does offer ~6% less performance in games. Regardless, the chipmaker says these X3D CPUs can cross the four-digit barrier officially in six titles when playing at 1080p resolution:

• Counter Strike 2
• League of Legends
• Valorant
• PUBG
• Naraka: Bladepoint
• Marvel Rivals

The slide includes the table with the above-mentioned games, along with details on what hardware combinations were used to cross 1000 FPS in these titles. Funny enough, only the RTX 5080 and 5090D (China-exclusive cutdown RTX 5090) can cross the mark in all six titles, when paired with a Ryzen 7 9800X3D and Ryzen 9 9950X3D, respectively. AMD's own Radeon RX 9070 XT only managed to hit 1000 FPS in Valorant and League of Legends.

Moreover, 6000 MT/s CL30 RAM was used for the testing, running on Windows 11 with Smart Access Memory (SAM/Resizable BAR) and virtualization disabled. AMD did not show benchmarks for the mobile 9955HX3D despite mentioning it as part of its 1000 FPS Club, so we'll just have to take its word for it. There was no specific cooler listed either so — as long as you're keeping these beasts in check, preventing them from thermal throttling — you too can expect to enjoy a glorious thousand frames.

Of course, 1000 Hz monitors don't exist yet so this is just an in-house flex of sorts, boasting how far ahead AMD is when it comes to gaming prowess. The fastest gaming monitors today are 720 Hz OLED panels that achieve that refresh rate while running in dual mode at a low 720p resolution. Perhaps, AMD can squeeze out even more frames at those settings.

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Singhal's departure from Intel just eight months after he succeeded Sailesh Kottapalli as chief architect of Xeon products highlights the turmoil at Intel in general and the company's Data Center Group in particular. Sailesh Kottapalli left in January to join Qualcomm's renewed server CPU initiative, whereas Justin Hotard, general manager of DCG, left the company to become chief executive of Nokia in February. Hotard succeeded Sandra Riviera in early 2024 as Riviera chose to become chief executive of Altera, which was spun off later that year (Riviera was replaced this August). A few days ago, Intel appointed Kevork Kechichian as the head of DCG.

Ronak Singhal joined Intel in 1997, right after graduating from Carnegie Mellon University. His most recent role included responsibility for overall Xeon CPU strategy, roadmap execution, and platform-level integration. This included not only chip design but also adjacent technologies such as memory systems, platform security features, and AI acceleration. Singhal was the second chief architect of Xeon products (after Kottapalli) in Intel's history. It is unclear whether he has influenced Intel's Xeon roadmap significantly.

Throughout his 28 years at Intel, Singhal has shaped the architectural direction of several critical product generations. In the late 1990s, he was involved in Pentium 4 validation, and then he led performance optimization for Nehalem and Westmere. He also oversaw the development of Haswell and Broadwell server CPUs. In general, he was quite a cross-disciplinary architect deeply embedded in Intel products as his technical oversight extended beyond cores to encompass CPU microarchitecture, memory systems, platform security, and eventually AI acceleration. Singhal has been granted 30 patents covering CPU architectures.

The leadership transition aligns with Lip-Bu Tan's strategy to revamp the whole company and Intel's Data Center Group. To accelerate changes, Tan appointed former Arm executive Kevork Kechichian as executive VP and GM of the group. He also shifted accelerators development to a Sachin Katti-led AI subdivision, making CPUs the primary focus within the data center unit.

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While the Core i5-110 is clearly a Comet Lake part, Intel markets the new chip under the Core Series 1 moniker. The Core Series 1 mainly comprises mobile and embedded Raptor Lake chips. However, Intel has used the series to mask some of its rebadged processors, such as the Core 5 120, which the chipmaker also silently launched. Therefore, the Core i5-110 is the second desktop chip (that we know of) that Intel has added to the Core Series 1 family.

The Core i5-110, launched in the third quarter of this year, features a six-core, 12-thread configuration with a maximum of 12MB of L3 cache. It features a base clock speed of 2.9 GHz, with a turbo boost clock speed that reaches up to 4.3 GHz. Comet Lake is built on the Skylake microarchitecture, and these processors are produced using Intel's 14nm+++ process technology.

Intel Core i5-110 Specifications

The Core i5-110 is a rebadge of the previous Core i5-10400, launched in 2020. The specifications are identical for the two 14nm+++ chips in every way. Both are 65W processors with an Intel UHD Graphics 630 engine that operates between 350 MHz and 1.1 GHz, supporting up to 128GB of DDR4-2666 memory.

The Core i5-110 is a desktop processor, meaning it is compatible with an LGA1200 socket and either an Intel 400-series or 500-series motherboard. However, Intel has introduced two new sockets since LGA1200, so it's a mystery just how many consumers still have a LGA1200 motherboard that can accommodate the Core i5-110.

Despite the Core i5-110 being a blatant rebrand, Intel is still charging the same price for the chip as it was when it launched five years ago. The RCP (Recommended Customer Price) for the Core i5-110 is $200, which falls within the same range as the Core i5-10400's $200 to $210. It's an insane price considering that 14nm+++ chips should be dirt cheap to produce by now.

At $200, the Core i5-110 is supposed to be a value processor, but it's hard to see the value in it.

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11% - 12% higher CPU performance

The latest A19 Pro smartphone CPU from Apple scores 3,895 points in single-thread Geekbench 6 tests, outpacing its predecessor by 11% and Qualcomm's Snapdragon 8 Elite by 36%. In addition, the new chip leaves behind all stock processors for client devices, including Apple's own M4 (by 5.3%) and AMD's mighty Ryzen 9 9950X (by 11.8%). Given Apple's focus on performance efficiency, it is not surprising that the new SoC beats everything in single-thread workloads.

The new A19 Pro application processor also scores 9,746 points in the multi-thread Geekbench 6 test, which is 12% higher compared to A18 Pro. However, the smartphone SoC still cannot beat CPUs for desktops and notebooks in multi-thread workloads, which is not surprising.

While an 11% - 12% generation-to-generation performance increase looks fairly solid, it is lower compared to the improvements of the A18 Pro compared to the A17 Pro (circa 18%).

Apple's A19 Pro SoC features two high-performance cores operating at up to 4.26 GHz (+6.5%) and featuring improved branch prediction (higher performance in branch-heavy workloads and better power efficiency) and increased front-end bandwidth (which points to higher instructions-per-cycle, but does not indicate how many instructions the core can decode per cycle) as well as four energy-efficient cores that now boast with a 50% larger last level cache compared to the predecessor.

The A19 Pro processor is made by TSMC on its N3P fabrication process, which is an optical shrink of N3E that enables a 4% higher transistor density as well as a 5% performance increase at the same power or a 5% - 10% power consumption reduction at the same frequency compared to N3E.

Given the capabilities of the fabrication process, a 6.5% clock speed boost looks quite solid. The CPU also has some microarchitectural improvements, so its performance advantages over its predecessor go beyond the frequency improvement. However, given the fact that Apple uses a vapor chamber cooling system and an aluminum unibody chassis for its iPhone 19 Pro, it is surprising that the company did not increase CPU clocks more significantly to get higher peak performance. Perhaps the company decided to focus on workloads that are branch-heavy and/or benefit from higher IPC more than from sole frequency; it looks like these enhancements do not significantly improve performance in Geekbench 6.

37% higher GPU performance

At the presentation of its A19 Pro, Apple did not reveal anything about improvements to its GPU, but said that it still has six clusters. Based on Geekbench 6 results published so far, the A19 Pro GPU is a whopping 37% faster than its predecessor. The GPU scores 45,657 points, which is comparable to the GPU performance of M2 or M3 in iPad Air. It is also comparable to the performance of AMD's Radeon 890M integrated GPU.

The Apple A19 Pro GPU shows the highest performance advantages over its predecessor in Background Blur (relevant for depth-of-field in games, real-time multi-layer compositing, video background blur, etc.) and Gaussian Blur (relevant for post-processing, vision processing, FPU operations). Still, the new GPU is faster than its predecessor quite significantly across the board.

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The statement came from Intel's Corporate Vice President, Investor Relations, John Pitzer. He said: "We've got a couple of holes we've got to fill on the desktop front. But quite frankly, we feel confident in the road map [...] We'll have a refresh of Arrow Lake next year, which will help start the process on the desktop side, and then we'll conclude that with Nova Lake when we launch late next year into 2027."

We've been hearing hints about a refresh of the Core Ultra 200 generation of CPUs for some time now, with various rumors about what it might involve. Improved binning and clock speed tweaks should result in a higher boost clock for CPUs involved in the refresh, though that may be limited to just K and KF-series models if some rumors are to be believed.

There was some talk about Intel introducing a newer, more capable neural processing unit (NPU) for AI workloads, but the most recent reports suggest that this is no longer happening, or was never officially planned.

The upgraded Core Ultra 200 CPUs are expected to maintain the same core counts, though we may see increased power limits in some models.

A 2026 launch for such a refresh, though, feels quite late. By the middle of 2026, Intel's Arrow Lake generation will be almost two years old, and AMD will likely be well on its way to launching its next-generation Zen 6 CPUs. Although some recent rumors suggest mobile Zen 6 CPUs might not launch until 2027, giving Intel some breathing room to launch Nova Lake, the desktop versions should arrive before the end of the year. AMD will release more concrete roadmap details this November, giving us a clearer outline of what to expect over the next 18 months.

Whether Zen 6 and Nova Lake debut before the end of 2026 or just after, though, that's not a huge lead time for any Arrow Lake refresh processors to gain much ground. They'd need to be notably faster than existing Core Ultra 200 CPUs to be particularly relevant, so far from the original launch date, and pricing would need to be exceedingly favorable to attract buyers who can see so many shiny next-generation CPUs just over the horizon. Especially since Nova Lake is expected to use an entirely new socket, severely limiting upgrade paths for Arrow Lake buyers.

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At first glance, comparing the $470 AMD Ryzen 7 9800X3D with the flagship $670 Ryzen 9 9950X3D might seem like an uneven match. After all, the Ryzen 9 9950X3D commands a $200 higher price point and boasts twice the number of cores, which naturally suggests superior performance.

However, this faceoff dives deeper than just raw numbers and sticker price. It explores how these two processors, both from AMD’s gaming-optimized Zen 5 X3D lineup, cater to different needs and whether the premium flagship truly justifies its cost in real-world scenarios.

The Ryzen 9 9950X3D sits at the very top of AMD’s desktop CPU hierarchy, aimed at enthusiasts and professionals who demand the utmost in multi-threaded performance alongside gaming capabilities. It's the "no compromises" option, commanding a premium price befitting its halo status.

In contrast, the Ryzen 7 9800X3D offers a more focused approach, targeting gamers and mainstream users who seek exceptional gaming performance and efficiency without the complexity or cost of a higher-core-count processor.

Priced around $450 compared to the 9950X3D’s $700 tag, the 9800X3D challenges the notion that more cores and higher prices always translate to a better CPU. Forget assumptions, let's dissect where these two exceptional gaming processors truly excel and uncover which one deserves a place in your ultimate rig.

Features and Specifications: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

Both the AMD Ryzen 9 9950X3D and Ryzen 7 9800X3D represent the pinnacle of AMD's desktop processor engineering, built on the sophisticated Zen 5 architecture fabbed on TSMC's advanced 4nm manufacturing process. These processors share the same foundational architecture but differ significantly in their core configurations and target use cases.

The 9950X3D is a dual-CCD powerhouse featuring 16 cores and 32 threads, while the 9800X3D adopts a streamlined single-CCD design with 8 cores and 16 threads. This architectural divergence creates distinct performance profiles, with the 9950X3D targeting users requiring substantial multi-threaded performance alongside gaming excellence, whereas the 9800X3D focuses exclusively on delivering optimal gaming performance without the complexity of a multi-die design.

The 9950X3D's dual-CCD configuration incorporates two separate 8-core complexes, with only one CCD receiving the 3D V-Cache treatment. This asymmetric design results in 128MB of layered L3 cache, creating a complex but powerful architecture that requires sophisticated thread scheduling. Thankfully its automated through AMD's innovative driver.

In contrast, the 9800X3D's single-CCD design features a uniform 8-core complex with 96MB of total L3 cache, providing consistent performance characteristics across all cores and simplifying both hardware design and driver optimization.

Clock speed specifications reveal differences between these processors, with the 9950X3D operating at a 4.3GHz base clock with boost capabilities reaching 5.7GHz, representing the highest boost clock in the X3D lineup. The 9800X3D, conversely, features a 4.7GHz base clock with boost frequencies of 5.2GHz.

The second-gen 3D V-Cache tech represents a revolutionary architectural advancement that marks a big improvement over their predecessors. Unlike previous X3D generations, where the 3D V-Cache was positioned above the CCD, both processors feature the cache positioned below the CCD, enabling direct thermal contact between the cores and the integrated heat spreader.

This design transformation dramatically improves thermal characteristics, allowing both processors to achieve full overclocking capabilities (a first for X3D processors) while maintaining higher boost frequencies than their predecessors. The thermal improvements are particularly significant for the 9950X3D, which maintains its 170W TDP despite its larger cache capacity.

Platform support and connectivity specifications show AMD's commitment to the AM5 ecosystem. Both CPUs drop into the AM5 socket (LGA 1718) and are compatible with the full range of AM5 chipsets, including A620, B650, B650E, X670, X670E, X870, X870E, B840, and B850. Memory support extends to DDR5 with official specifications up to 5600 MT/s, though both processors can achieve higher speeds through AMD EXPO memory overclocking technology.

The processors provide 24 usable PCIe 5.0 lanes from the CPU, four native USB 3.2 Gen 2 ports, and comprehensive storage support including NVMe RAID configurations. Power consumption differs significantly, with the 9950X3D coming with a 170W TDP compared to the 9800X3D's 120W TDP, reflecting the increased thermal and power demands of the dual-CCD configuration.

⭐Winner: AMD Ryzen 9 9950X3D

The Ryzen 9 9950X3D and Ryzen 7 9800X3D share a common Zen 5 foundation but diverge in their feature sets to serve distinct purposes. On paper alone, the Ryzen 9 9950X3D is more impressive due to its higher clocks and additional cores, thus taking this round.

Gaming Benchmarks and Performance: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

While our in-depth Ryzen 9 9950X3D and Ryzen 7 9800X3D reviews offer a more comprehensive analysis and our test system specs, in this section, we will focus on a gaming performance overview. The following benchmark graphs display average FPS and 1% lows for various games at 1080p. Using a high-end Nvidia GeForce RTX 5090 graphics card ensures GPU limitations are removed, making this setup ideal for comparing pure CPU performance.

In our 16-game geometric mean at 1080p with High/Ultra settings, the Ryzen 7 9800X3D narrowly edges out the Ryzen 9 9950X3D with an average of 195.5 FPS versus 194.8 FPS, which is a negligible 0.4% difference. This parity stems from AMD’s 3D V-Cache technology, which minimizes latency in cache-sensitive titles.

However, the 9950X3D’s higher core count rarely translates to gaming gains, as most games prioritize cache and clock speeds over core quantity. For example, in A Plague Tale: Requiem, the 9800X3D leads by 5.9% on average, likely due to its optimized single-CCD design reducing inter-core latency.

On the flip side, the 9950X3D pulls ahead in 1% lows according to our testing, scoring 136 FPS in the geomean compared to the 9800X3D’s 134 FPS, gaining a minor 1.4% advantage. This reflects its superior multi-core capabilities, mitigating stutter during asset streaming or background tasks.

Moving on to individual results, the picture becomes even more nuanced and needs analysis on a case-by-case basis. In our testing, we typically see that cache-bound games favor the 9800X3D. Minecraft RT shows a 10.9% average FPS lead. In Starfield, the Ryzen 7 leads by 1.7% in average FPS.

On the contrary, heavily multi-threaded titles seem to lean toward the 9950X3D. In Baldur’s Gate 3, the Ryzen 9 leads by about 2.6%, exploiting its dual-CCD design to gain an advantage in this title.

The 9800X3D dominates efficiency, achieving 2.46 FPS/W versus the 9950X3D’s 1.61 FPS/W, which is a tremendous 52.8% improvement. It consumes just 79.4W under load according to our testing, while the 9950X3D draws 52% more power at 120.9W. This gap arises from the 9800X3D’s monolithic 8-core design, which avoids the power overhead of the 9950X3D’s dual-CCD configuration.

The 9800X3D also offers superior value for money, gaining a staggering 50% advantage in our FPS per dollar chart. Priced 33% lower, the Ryzen 7 achieves almost the same average FPS in our Geomean as the 9950X3D. Even in titles where the 9950X3D wins, like Far Cry 6, the 9800X3D’s cost efficiency remains unmatched. The 9950X3D does not justify its price premium in the gaming category when compared to its younger sibling.

⭐Winner: AMD Ryzen 7 9800X3D

Unless you are pairing gaming with heavy streaming or rendering, the 9800X3D’s cache-optimized design and aggressive pricing make it AMD’s gaming champion.

Ultimately, the Ryzen 7 9800X3D emerges as the smarter gaming investment. It matches the 9950X3D in average framerates while excelling in efficiency and value. The 9950X3D’s edge in 1% lows is nice, but it cannot be justified by its hefty price premium.

Productivity Performance: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

According to our benchmark results, the Ryzen 9 9950X3D demonstrates a substantial productivity advantage over the Ryzen 7 9800X3D across both single-threaded and multi-threaded workloads.

In the aggregated single-threaded geomean, the 9950X3D scores 258, while the 9800X3D trails at 243, leaving a 5.8% performance gap. For multi-threaded geomean, the disparity widens dramatically: the 9950X3D achieves 635 versus the 9800X3D’s 367, translating to a 42% delta. This underscores the 9950X3D’s superior power budget and higher core count.

The 9950X3D’s 16-core design obliterates the 9800X3D’s 8-core setup in heavily parallelized tasks. Cinebench 2024 multi-core reveals a massive 43% performance delta; meanwhile, the POV-Ray multi-core test exacerbates this further as the 9950X3D scores a whopping 69% higher than the 9800X3D.

Real-world encoding tests like HandBrake x265 further validate this trend, with the 9950X3D achieving a 63% leap over the 9800X3D. This makes the 9950X3D a powerhouse for video rendering, 3D compilation, or scientific simulations where core scalability is paramount.

In tasks reliant on single-core speed, the 9950X3D also maintains a consistent lead, even though the gap narrows significantly. Cinebench 2024 single-core shows a 4.7% advantage, and the gap expands in POV-Ray single-core, where the 9950X3D has a 7.6% higher score than its younger sibling.

Even in lighter workloads like WebXPRT4 (browser-based tasks), the 9950X3D maintains a modest but notable 4.4% edge. The narrower gap confirms that browser-based tasks are less core-dependent, favoring cache/clock speed, yet the 9950X3D still leads. These modest gains reflect the close architectural similarities between the two CPUs in tasks that don’t necessarily scale with core count.

The 9950X3D’s dual-CCD layout (one with 3D V-Cache, one with higher clocks) optimizes it for hybrid productivity: cache-sensitive tasks leverage the stacked die, while all-core workloads engage both CCDs. The 9800X3D’s single-CCD design restricts it in lighter multi-threaded tasks despite its cache advantage.

Putting it all together, for productivity alone, the Ryzen 9 9950X3D is decisively superior, delivering 10-40% higher performance on average, with peaks exceeding 60% in core-heavy tasks. The Ryzen 7 9800X3D remains viable for budget-focused users handling lighter workloads, but professionals demanding uncompromised rendering, encoding, or compilation speed should opt for the 9950X3D.

⭐Winner: AMD Ryzen 9 9950X3D

Its massive compute throughput advantage, driven by its doubled core count, makes the 9950X3D the unequivocal choice for professional productivity, while the 9800X3D serves well for mainstream users where its strong gaming performance and lower cost are prioritized over extreme multi-threaded muscle.

Overclocking: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

Both the AMD Ryzen 9 9950X3D and Ryzen 7 9800X3D represent a significant advancement in X3D processor overclocking capabilities compared to their predecessors. Unlike previous X3D generations that had severe overclocking limitations, both Zen 5-based processors support full manual overclocking, including multiplier adjustments, voltage modifications, and extensive tuning options.

This is a revolutionary change from the Zen 4 X3D processors that were largely locked down, with the 7800X3D only supporting limited PBO and Curve Optimizer adjustments. The key architectural improvement enabling this overclocking freedom is AMD's redesigned 3D V-Cache placement.

In Zen 5 X3D processors, the 3D V-Cache is positioned underneath the Core Complex Dies (CCDs) rather than on top, dramatically improving thermal management and reducing the voltage sensitivity that previously restricted overclocking. This design change allows both processors to maintain higher boost frequencies while supporting the same overclocking toolkit as the regular Zen 5 processors.

The processors responds well to both traditional overclocking methods and AMD's advanced tuning tools, including Precision Boost Overdrive 2 (PBO2), Curve Optimizer, and the new Curve Shaper feature exclusive to Zen 5 processors. AMD has plenty of manual tuning option available, but most users are best just engaging the automated Precision Boost Overdrive (PBO) feature.

⭐Winner: Tie

Both chips leverage the same AMD overclocking suite, so this section works out to a tie.

Power Consumption, Efficiency, and Cooling: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

According to our test results, the power profiles of the Ryzen 9 9950X3D and Ryzen 7 9800X3D reveal significant differences under load while showing remarkable similarity at idle, directly impacting efficiency and cooling requirements.

Under sustained AVX workloads, the 9950X3D consumes substantially more power than the 9800X3D, reflecting its higher core count and performance ceiling. In the grueling Prime95 Small FFTs test, the 9950X3D averages 215W compared to the 9800X3D's 171W, which is a substantial 25.7% increase. This pattern repeats in y-cruncher's AVX test, where the 9950X3D draws 23.9% more power than the 9800X3D.

Even in Cinebench 2024 multi-core rendering, which favors thread scaling, the 9950X3D requires 57.8% more power than its younger brother. This consistently higher power draw under heavy vectorized or multi-threaded loads is inherent to the 9950X3D's doubled core resources.

Remarkably, both CPUs demonstrate nearly identical power efficiency during low-activity states. In active idle states (such as YouTube playback), the 9950X3D uses 31% more power than the 9800X3D, but the actual difference is 9W. However, in true idle scenarios, the gap narrows to just 3W, which is pretty negligible in the big picture. This parity highlights that the 9950X3D efficiently powers down unused cores, but also highlights that both chips carry the same power burden of the central I/O die, which ultimately results in higher idle power consumption for Zen 5 processors compared to Intel offerings.

Despite its higher power consumption, the 9950X3D often delivers superior performance-per-watt in multi-threaded tasks. In our Cinebench 2024 "Watts per Point" metric, the 9950X3D scores a 10.8% efficiency advantage over the 9800X3D. Similarly, in HandBrake x265 encoding, the 9950X3D achieves a 6.4% lead in efficiency despite consuming more raw power in the test itself.

This indicates the 9950X3D's additional cores translate workloads into completed tasks more efficiently under heavy utilization. The "Estimated Task Energy" graph further confirms this trend, placing the 9950X3D in a significantly better (lower-right) position than Intel competitors and delivering way more FPS than the 9800X3D despite consuming almost similar task energy.

The 9950X3D's higher sustained power load necessitates more robust cooling. A 360mm AIO liquid cooler is optimal for the 9950X3D to maintain optimal boost clocks during extended AVX workloads. The 9800X3D, with its peak draw nearly 20-25% lower, is far more forgiving. A capable dual-tower air cooler or 240mm AIO should suffice in most cases.

At the end of the day, the Ryzen 7 9800X3D is the clear winner if you just compare the two CPUs by their peak power consumption, especially under heavy AVX loads, making it ideal for users prioritizing low heat output, quieter cooling, or constrained thermal environments.

However, the Ryzen 9 9950X3D consumes 25-58% more power under load but delivers 6-11% better performance efficiency (work completed per watt) in multi-threaded scenarios like rendering and encoding. For users needing maximum multi-core throughput, the 9950X3D's efficiency may justify its higher power ceiling, though it demands stronger cooling to realize its full potential.

⭐Winner: Tie

If you want the absolute lowest power draw, the Ryzen 7 9800X3D is the obvious pick among these two CPUs. It is also easier to cool and is generally quite tame compared to the Ryzen 9 9950X3D, which consumes significantly more power under load.

In contrast, the 9950X3D takes a significant win in power efficiency (performance-per-watt), highlighting that it delivers exceptional power characteristics of its own.

Overall both chips have their charms, depending on the target workload. That leaves us with yet another tie -- the winner just depends on your personal use-case.

Pricing: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

When comparing the AMD Ryzen 9 9950X3D and the Ryzen 7 9800X3D, the starting point is their respective CPU prices: the Ryzen 9 9950X3D costs $670 at the time of writing, while the Ryzen 7 9800X3D is priced at $470, a difference of $200. However, to truly assess which CPU offers better value for the money, it’s essential to consider the entire platform cost, including the motherboard, RAM, and CPU cooler.

When examining the complete platform cost, both processors share identical requirements for supporting components, but they do have different needs in some areas. DDR5 memory pricing remains consistent across both builds, with 32GB of DDR5-6000 memory costing around $120-$150.

The AM5 socket requirement means both CPUs could use the same types of motherboards, ranging from budget B650 boards at $125-$160 to premium X870 motherboards that can cost $320-$500. However, the 9950X3D's higher power consumption and thermal output requires a better motherboard than the 9800X3D.

With a higher TDP and peak power consumption, the 16-core 9950X3D necessitates more robust VRM designs on motherboards for full performance, potentially adding $50-$100 to the platform cost.

Cooling the Ryzen 7 9800X3D, which has a lower TDP (120W) compared to its higher-end sibling (170W), can be adequately handled by a mid-tier solution. Options include a $50 to $70 air cooler or a $100 to $150 240mm AIO liquid cooler. In contrast, the Ryzen 9 9950X3D would benefit from a more capable solution, with a 360mm AIO liquid cooler being optimal, which can cost you about $150-200.

Conclusively, the 9800X3D emerges as the superior choice for value-conscious builders, despite both processors delivering nearly identical gaming performance, as we already saw. The nearly $230 price difference represents money that could be allocated toward a better graphics card, faster storage, or premium peripherals, which are components that would provide more tangible benefits for gaming performance.

As for the 9950X3D, its additional productivity capabilities justify its premium only for users who can leverage its extra cores for content creation, streaming, or professional workloads.

⭐Winner: AMD Ryzen 7 9800X3D

For the vast majority of enthusiasts prioritizing gaming and overall bang-for-buck, the 9800X3D's combination of potent gaming performance and lower total platform cost makes it the clear winner for value. The 9950X3D is best reserved for users who explicitly need its extra cores and are willing to invest in the supporting high-end platform.

Bottom Line: AMD Ryzen 9 9950X3D vs AMD Ryzen 7 9800X3D

The AMD Ryzen 9 9950X3D and Ryzen 7 9800X3D both bring impressive strengths to the table, ultimately leaving us with a 4-4 tie, but the winner for you will be clear based on your target workloads and budget.

The Ryzen 7 9800X3D is the clear champion for most users, particularly those prioritizing gaming performance and value. Its dominance in gaming performance, power efficiency, and pricing creates a compelling package that delivers exceptional results without unnecessary complexity. The single-CCD design eliminates the scheduling challenges that can plague dual-CCD configurations, making it the ideal choice for gamers who want maximum performance with minimal fuss.

On the other hand, the Ryzen 9 9950X3D remains the superior choice for a specific audience: professionals and content creators who demand both exceptional gaming performance and serious productivity capabilities. Its 16-core, 32-thread configuration provides superb multi-core performance that makes it the ultimate all-round CPU for users who refuse to compromise between gaming and professional workloads.

For the vast majority of gaming enthusiasts and high-performance PC builders, the AMD Ryzen 7 9800X3D is the unequivocal recommendation and king of gaming value. It delivers virtually identical top-tier gaming performance to the 9950X3D while being significantly cheaper, more power-efficient, easier to cool, and less demanding on the supporting platform.

The Ryzen 9 9950X3D remains a formidable, niche processor, but its considerable price premium and higher platform costs are only justifiable for users who simultaneously require maximum gaming performance and very high levels of multi-threaded productivity performance on a daily basis.

Both chips have their place, and the clear swim lanes for the 9950X3D and 9800X3D show that AMD has done an excellent job in stratifying the Ryzen 9000 X3D lineup, delivering strong value for two very different chips and ultimately earning its price tag for each chip. Meanwhile, Intel's chips simply can't compete with either of these chips in gaming. Here's hoping for a more competitive Intel with its next-gen chips.

🏆Winner: Tie

More CPU Faceoffs

• AMD Ryzen 9 9950X vs Intel Core i9-14900K
• Intel Core i5-14400 vs AMD Ryzen 5 7600X
• AMD Ryzen 7 7800X3D vs Intel Core i9-13900K vs Core i7-13700K
• AMD Ryzen 9 7950X3D vs Intel Core i9-13900K Faceoff

"The structure of the government financing is that they also got warrants associated with Intel stock, it triggers off [if we sell] below or selling more than 50% of the business," said David Zinsner, the CFO of Intel, at Citi's 2025 Global TMT Conference. "I think, as long as we hold 51% essentially it does not trigger, and it is a five-year warrant. […] Our motivation will probably be not to sell below 51% because that would dilute investors significantly. Unless it made economic sense for investors for us to do that. So, the likelihood is, if we are selling stakes in Foundry, it would be something less than 49% that would be sold off."

Keeping Intel Foundry an American foundry

According to Intel's contract agreement with the U.S. government, under which Intel converted its grants into cash in exchange for equity, the company must control at least 51% of Intel Foundry over the next five years or risk triggering punitive clauses (a 5% warrant at $20/share). The same terms applied to Intel's grants under the CHIPS and Science Act, so the company was obliged to maintain a majority ownership stake in its Intel Foundry for some time.

From the U.S. government's point of view, by holding the majority, Intel keeps the foundry business aligned with U.S. national security and reshoring goals and ensures domestic fab capacity remains under the control of a U.S. company, which is particularly important given geopolitical risks (i.e., China–Taiwan tensions).

However, requiring Intel to retain majority ownership (over 51%) of its Intel Foundry unit significantly disrupts the possibility of a full spin-off — at least in the next five years. A true spin-off would typically mean Intel divests its foundry operations into a separate, independent company with its own ownership and governance (as AMD did with GlobalFoundries in 2009). But a 51% requirement constrains this, capping how much capital Intel can raise from outside investors, which may be needed to stay competitive with TSMC, Samsung, or emerging Chinese foundries.

Semiconductor Co-Investment Program (SCIP)

While for now Intel controls and operates all of its semiconductor production capacities in the U.S., Ireland, and Israel, as well as packaging facilities in the U.S., Puerto Rico, Malaysia, and China, it should be noted that Intel does not completely own all of its fabs.

Back in 2022, Intel kicked off its Semiconductor Co-Investment Program (SCIP) arrangement, under which it attracted investors (and essentially raised $26 billion) without violating the CHIPS Act requirement or the U.S. government’s 51% ownership clause tied to a potential Intel Foundry spin-off.

However, this means that Intel lost 100% control of its advanced fabs. As a result, Intel's leading-edge Fab 52 and Fab 62, located in the Ocotillo campus in Arizona, are co-owned by Intel (51%) and Brookfield Infrastructure (49%). The company's Fab 34 in Ireland is also owned by Intel (51%) and Apollo Global Management (49%).

These arrangements under the SCIP program are not a spin-off, but asset-level co-financing structures, so the foundry unit stays inside Intel. Intel still owns and operates the fabs, but splits the capital investment with partners like Brookfield Infrastructure and Apollo Global Management. In each case, Intel retains exactly 51% equity and operational control, meaning it does not breach the U.S. government's ownership clause for CHIPS funding or equity conversion.

In theory, if Intel decides to start building out its Silicon Heartland site in Ohio in the coming years (not sometime in the 2030s), then it can use the same SCIP program to raise the necessary capital and build new capacity without requiring a spin-off or IPO and without violating the contract with the U.S. government.

IPO is still a possibility

Potentially, Intel's SCIP initiative does not stop a hypothetical IPO as there is a difference between corporate equity of Intel Foundry and project-level asset ownership (e.g., Fab 52, Fab 62, Fab 34). From an IPO perspective, selling 49% of Intel Foundry means selling a stake in the overall earnings and cash flow of the foundry business, not in each fab's underlying real estate or assets.

The Intel Foundry division includes the full foundry business — such as process technologies that cost billions, design services, customer contracts, and global capacity — even if some fabs (like Fab 52/62 in Arizona and Fab 34 in Ireland) are only 51%-owned via joint ventures with Brookfield and Apollo. Intel still retains operational control of these fabs and consolidates their revenue, so they remain part of the foundry offering.

However, the partial fab ownership introduces minority interest adjustments in financial reporting, so investors would still value Intel Foundry based on its total capacity, customer pipeline, and roadmap, with appropriate discounts or disclosures for asset-level co-investments.

As a consequence, partial ownership of key fabs by third parties means Intel would likely raise less money in an Intel Foundry IPO, as investors will discount the valuation to reflect the fact that Intel does not retain 100% of the cash flow from those facilities. While Intel still controls Intel Foundry as a corporate entity and consolidates fab revenues, its share of profits from co-owned fabs is limited to 51%. Investors will factor in these minority interests and payout obligations when pricing shares. The added complexity also introduces risk, which may further reduce the valuation, which means that it may make no financial sense for Intel to IPO or spin off Intel Foundry.

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Intel has added 7 Days to Die, Assetto Corsa, Cities: Skylines, Delta Force: Black Hawk Down, Deus Ex; Mankind Divided, Dyson Sphere Program, EA Sports FC 24, God of War, Kerbal Space Program 2, Like a Dragon: Infinite Wealth, Metro Exodus Enhanced Edition, The Callisto Protocol, Wolfenstein Youngblood, World of Warships and Shushan: The First Chapter (蜀山初章) to APO.

Intel claims its game profiles for these new titles provide up to a 14% boost in performance on its flagship Core Ultra 9 285K CPU. Metro Exodus Enhanced Edition gains a 14% performance improvement compared to running the game without APO on. Similarly, Dyson Sphere Program gains 11%, Cities: Skylines 9%, The Callisto Protocol 4%, Wolfenstein: Youngblood 4%, Shushan: The First Chapter 4% and World of Warships 3% more performance from APO.

1% lows also improve thanks to Intel's APO optimizations. Dyson Sphere Program reportedly gains 21% greater 1% lows, World of Warships 9%, and Cities: Skylines 5%.

So far, this is the first update Intel has provided for APO in 2025. The application launched in 2023 to address performance regressions caused by improper thread scheduling on Intel's hybrid CPUs. APO does not merely block the E-cores from being used in supported games; instead, each game profile is uniquely tuned to the unique properties of each supported CPU model. Assigning threads based on the game's real-time demands.

APO natively supports all of Intel's latest K-series Arrow Lake-S processors, ranging from the Core Ultra 9 285K to the Core Ultra 5 245KF. Intel's older 14th Gen K-series parts are also supported, ranging from the flagship Core i9-14900KS down to the Core i5-14600KF. On the mobile side, Intel's Core Ultra 9 285HX, 275HX, Core Ultra 7 265HX, 255HX, Core Ultra 5 245HX, 235HX, Core i9-14900HX, and Core i7-14700HX are supported.

For all other CPU models, including non-K parts, dating back to 12th Gen Alder Lake, APO maintains limited support for these CPUs through the application's "Advanced Mode". This feature enables users to manually add games to APO that have not been validated, potentially providing additional performance for these parts. However, the caveat is that Advanced Mode does not have Intel's validation to back up any potential performance improvements, forcing users to manually benchmark games to determine whether APO can provide an uplift. In a worst-case scenario, Intel claims Advanced Mode can regress performance.

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As expected, the Ryzen 5 9500F has a 6-core, 12-thread processor built on Granite Ridge silicon. It has a 5 GHz boost clock, up from a 3.8 GHz base clock. There's also 32 MB of L3 cache on board, along with a 65W TDP — the same as the higher-spec'd Ryzen 5 9600 and 9600X.

Speaking of the 7500F, the new 9500F is seemingly at least 7% faster than its predecessor, and up to 24% faster in certain CPU-intensive games. AMD's own benchmarks put the 9500F around 15% ahead of the 7500F on average, which is a very respectable gen-on-gen uplift. While the chipmaker did not publish any productivity claims, these numbers largely align with last week's Geekbench leak, where the 9500F was stacked quite closely to the 9600 and 9600X, despite having lower clock speeds.

As the name suggests, the 9500F lacks integrated graphics, as it does not contain the RDNA2 cores found in other Zen 5 chips. AMD started including iGPUs in their mainstream desktop CPU lineup since the Ryzen 7000 series, and the "F" variant represents essentially their best value. By ditching said graphics and cutting down on some specs, you get a better deal. Unfortunately, that's not the case here as the 9500F is priced at 1,299 Yuan (roughly $180), which is around the same as both the 9600 and 9600X, so they automatically render this inferior.

However, when it launches worldwide, AMD could introduce a lower price that's more in line with their actual listed prices for other, current-gen Ryzen CPUs. For context, the 7500F officially launched at just $175, which is a much more sensible price. However, even then, these chips are often discounted during sales. In contrast, the 9500F was listed for $217 on ShopBLT momentarily before being removed. Regardless of availability, the 9500F appears to be a solid upgrade on paper, and it's almost guaranteed to be a hit, just like its predecessor, if priced right.

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It’s a short but pointed comment that lands hard in the middle of Intel’s planned foundry turnaround. The company has staked its future on becoming a contract manufacturer for other chip designers and has repeatedly said that its roadmap depends on securing a large external customer. Unfortunately for Intel, Amon’s remarks obliterate one of Intel’s most realistic prospects for building advanced client silicon for an outside firm, at least in the near term.

Qualcomm’s Snapdragon X chips are currently manufactured by TSMC on its N4 process. This is a dense, power-efficient 4nm-class node that TSMC has tuned for mobile SoCs with large GPU and NPU blocks. Qualcomm is shipping those chips today in a growing class of Arm-based laptops with power efficiency levels that rival and at times outstrip even the most modern Intel chips.

Performance is improving fast enough that Qualcomm is now a direct competitor to Intel in thin-and-light notebooks. This gives Amon’s statement some significant weight: One of the most promising companies in the PC space just publicly said that Intel isn't ready to deliver on its needs.

This also highlights an irony of Intel’s roadmap. The company’s upcoming Nova Lake products will allegedly be partly built using TSMC N2, with Intel 18A being reserved for lower-end parts. Intel is simultaneously competing with TSMC and relying on it, all while hoping to convince others — including Qualcomm — to become customers of its own process nodes.

Intel said in July that it might pause or abandon 14A development if it can’t win significant external business or achieve critical progress targets. Since then, questions have been raised about execution risk on 18A, the node the company has pitched as its return to industry leadership, due to yield issues. Amon’s comment doesn’t help.

Still, Qualcomm hasn’t slammed the door on Intel entirely. Amon said that his company would consider Intel if it could deliver on efficiency, and the two companies have previously signaled interest in working together. But for now at least, the Snapdragon X is staying with TSMC.

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